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Quantitative design space exploration of routing-switches for Network-on-Chip

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Academic year: 2017

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Fig. 1. NoC with mesh topology.
Fig. 2. Centralized architecture of a routing-switch with 4 ports.
Fig. 5. Performance of different routing-algorithms for a NoC with Mesh topology and 16 functional units.
Fig. 6. Area distribution of routing-switches with 5 ports, 32 bit data word length, registers at the input port and varied  routing-algorithms.
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