Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability
Jari Nurmi Electrical Engineering Unit
Tampere University Tampere, Finland jari.nurmi@tuni.fi
Darshika G. Perera
Department of Electrical & Computer Engineering University of Colorado Colorado Springs
Colorado Springs, CO, USA darshika.perera@uccs.edu
Abstract—This paper presents a cognitive radio architecture incorporating machine learning into its cognition engine. Both the cognition engine and the software-defined transmitter and receiver chains make use of reconfigurable technologies to enable adaptation to the radio operating environment.
Index Terms—Cognitive Radio, Software-defined Radio, Ma- chine Learning, Reconfigurable Computing, FPGA, Adaptive Systems, Cognition Engine, Spectrum Sensing.
I. INTRODUCTION
Software-Defined Radio (SDR) and Cognitive Radio (CR) have been investigated by the research community, military, and industry for the past three decades. While SDR features are being incorporated to modern digital wireless systems, the benefits of CR have not been widely adopted. The cognitive features of future radio devices, such as frequency agility, modulation adaptiveness, and context-awareness are crucial for exploiting the scarce resource of radio spectrum by co-existing opportunistic radio systems. Our proposed approach is based not only on harnessing the Machine Learning (ML) algorithms for optimizing the dynamic reconfiguration of the CR device, but also considering that the spectrum and modulation agility needed in the CR require purpose-built flexible transceiver structures enabling fast run-time reconfiguration.
The paper is organized as follows. Section II discusses the background and state-of-the-art in SDR, CR, reconfigurable hardware, and ML. In Section III, our CR architecture is introduced. Section IV discusses the selection of ML and reconfigurable technologies for our final CR implementation.
Section V concludes and discusses future work.
II. BACKGROUND
In this section, we summarize the state-of-the-art in basic technologies and approaches needed for our proposed solution for ML-based opportunistic radios.
A. Software-Defined Radio
Software-Defined Radio (SDR) refers to radio architectures where functionalities are implemented in software and/or in reconfigurable technologies. SDR is typically also software- controlled, i.e., there is a programmable processor controlling the parameters of the radio functions. The term “Software Radio” was first used in a publication by one of its pioneers,
Joseph Mitola, III [1]. Similar to many other inventions in this field, first SDR implementations were realized in the military context, for instance, in seeking interoperability between a number of tactical radios in the famous Speakeasy project(s) in early 1990’s [2]. In contemporary radio communication sys- tems, many aspects of SDR are already in the mainstream. The flexibility provided by SDR is also a pre-requisite technology for cognitive radios.
The state-of-the-art in software defined radio platforms was reviewed in [3], and the research and commercial SDR plat- forms were more thoroughly discussed in the book Computing Platforms for Software-Defined Radio [4]. Nowadays, SDR has become a high commodity especially in mobile network base-stations and wireless access points; thus, SDR is not being mentioned as a differentiating factor anymore. From a study done in 2011, 93% of mobile infrastructure was using SDR technology, and almost all the tactical radios used for military communications utilized SDR technology [5]. In wireless research, Universal Software-defined Radio Periph- eral (USRP) devices are commonly used for implementing prototype radio systems. For instance, NI USRPs can have up to 160 MHz bandwidth and adjustable frequency from 10 MHz to 6 GHz [6]. The capacity of even the high-end USRPs in terms of reconfigurable logic resources is quite limited (often in the order of 400k logic cells and 1,5k DSP slices); thus, external FPGA boards may need to be used if implementing more complex digital transceiver hardware.
There are also FPGA vendors’ own development boards with integrated adjustable analog RF front ends, such as Xilinx RF-SoC boards with up to 930k logic modules and over 4k DSP slices, in addition to an integrated front end with 6 GHz maximum input frequency [7].
B. Cognitive Radio
The godfather of SDR, Joe Mitola, also invented the term Cognitive Radio (CR) describing intelligent and flexible ra- dio devices capable of adapting to their radio environment.
In their groundbreaking article [8] Joseph Mitola, III, and Gerard “Chip” Maguire presented the Cognitive Cycle that still sufficiently represents the cognitive operation in any CR.
A simplified cognitive cycle is depicted in Fig. 1. In Section
IV, we introduce our own interpretation of the cognitive cycle, when discussing excessive machine learning in the CR.
Fig. 1. The Cognitive Cycle by Mitola (simplified).
The US Federal Commission of Communications (FCC) has identified in [9] several features that cognitive radios can incorporate to enable more efficient and flexible usage of spectrum. These features are as follows:
• Frequency Agility – Radio is able to change its operating frequency to optimize its use in adapting to the environ- ment.
• Dynamic Frequency Selection (DFS) – Radio senses signals from nearby transmitters to choose an optimal operation environment.
• Adaptive Modulation – Transmission characteristics and waveforms can be reconfigured to exploit all opportuni- ties for the usage of spectrum.
• Transmit Power Control (TPC) – Transmission power is adapted to full power limits and/or to lower power levels, as needed, to allow greater sharing of spectrum.
• Location Awareness – Radio is able to determine its location and the location of other devices operating in the same spectrum to optimize transmission parameters for increasing spectrum re-use.
• Negotiated Use – CR may have algorithms enabling the sharing of spectrum in terms of prearranged agreements between a licensee and a third party or on ad-hoc/real- time basis.
One widely adopted way to achieve spectrum efficiency is Dynamic Spectrum Access (DSA) [10], for which the Opportunistic Spectrum Access (OSA) provides the most dy- namic approach. Orthogonal Frequency Division Multiplexing (OFDM) modulation has been found as a promising technique for CR, since it uses a large number of subcarriers (as shown in Fig. 2 a)) amenable for dynamic adaptation [11]. Rajbanshi et al [12] proposed Non-Contiguous OFDM, exploiting OSA to detect primary users in the frequency band of interest, and suppressing the subcarriers overlapping with the primary user signal, as illustrated in Fig. 2 b). The reception of NC-OFDM is more challenging than transmission, since pilot subcarriers cannot be used, or there is no guaranteed location for them.
In our previous work, NC-OFDM was built on a pro- grammable multicore with IFFT pruning capability [13], and for the receiver synchronization, a reconfigurable multi-
correlator architecture was developed by implementing frequency-domain cross-correlation to detect the active sub- carriers, and time-domain autocorrelation to synchronize the received frames based on Cyclic Prefix [14]. Also, FFT pro- cessor architecture for DSA-enabled CR was developed [15].
Fig. 2. a) OFDM principle. b) NC-OFDM subcarrier pruning.
C. Reconfigurable Technologies for SDR and CR
FPGAs were first introduced in mid-1980s and have been evolving ever since, becoming more and more sophisticated.
In recent years, FPGAs are becoming increasingly popular among hardware designers, not only because current FPGAs provide a higher-level of flexibility than ASICs and higher performance than software running on processors, but also due to FPGA’s many attractive traits, including, post-fabrication reprogrammability, dynamic and partial reconfiguration ca- pabilities, and reduced time-to-market. Due to these traits, FPGAs are considered as a promising avenue to realize many real-time compute/data-intensive applications in various fields.
Since our approach is based on the Dynamic Partial Recon- figuration (DPR) and Coarse-Grained Reconfigurable Arrays (CGRA), in this paper, we will concentrate on the background of applying them on SDR and/or CR.
Next, we investigate the existing works on FPGA-based architectures for CR/SDR. This investigation reveals that there are many works in the literature on FPGA-based architectures for cognitive radios (CRs) and SDRs. However, there are only few existing works on dynamic and partially reconfigurable (DPR) FPGA-based architectures for CRs and SDRs. For instance, in [17], authors explored the utilization of DPR on FPGA for CR but did not implement the actual hardware.
In [18], authors utilized DPR to implement SDR comprising five wireless communication systems (i.e., Bluetooth, Wi- Fi, 2G, 3G, LTE) on the same area of the chip. In [19], authors proposed two approaches of DPR partitioning using single and multi-partitions for SDR systems, and implemented three communication standards for performance comparison.
In [20], authors proposed an FPGA-based DPR flow for Network-on-Chip (NoC) based CR, where requested IPs were dynamically reconfigured on a 4G telecommunication chain.
In [21], authors proposed CR platform on an FPGA with partial reconfiguration, and demonstrated the hardware-level adaptation using a DVB baseband.
For previous work, we have introduced unique DPR hard- ware architectures for several real-time compute/data-intensive applications, including data analytics [22] and cryptogra- phy [23], performed extensive investigations on dynamic re- configuration techniques on FPGAs [27], and introduced a de- sign methodology using DPR for embedded applications [24].
Fig. 3. A Coarse-Grained Reconfigurable Array and its PE structure.
Apart from the fine-grained reconfigurable architectures (such as FPGA), research has been conducted on Coarse- Grained Reconfigurable Arrays (CGRA), which have the granularity of 8-32 bits (or more) in their reconfigurable Processing Elements (PE). The advantages of CGRA include fast reconfiguration time, since the number of configuration bits needed to control a PE is a fraction of that needed to reconfigure similar functionality on FPGA. CGRAs are also easier to program using high-level languages. Typically, CGRAs are used as accelerators or co-processors connected to programmable processors, and not as stand-alone devices.
Fig. 3 illustrates a typical CGRA.
Fig. 4. 802.11a/g receiver implemented on a heterogeneous architecture (three RISC cores and four CGRA accelerators, connected by a Network-on-Chip between the blocks).
There are hundreds of CGRA architectures which are con- ceptually very similar. A good overview is given in a review paper by Podopas et al. [28]. The dominating word length in CGRAs is 32 bits, and the PE arrays contain from tens to hundreds of PEs. Clock frequencies achieved as an FPGA overlay are in the range of hundreds of MHz, whereas CGRAs as custom circuits can operate at up to 500MHz to 2GHz. In terms of power, CGRAs bridge the gap between processors and application-specific circuits. In a recent review paper [29], it was concluded that “With sufficient development of the field,
CGRAs could be the solution to maintain performance and energy scaling beyond Moore’s law.”
We have developed several CGRA architectures (e.g. BUT- TER [30], CREMA [31], SCREMA [32], AVATAR [33]) and heterogeneous computing platforms based on these architec- tures [34], and also applied them to implement SDR structures [35]. Effectively, our CGRA prototypes on FPGA are forming overlays, programmable on higher abstraction level. Fig. 4 depicts a heterogeneous platform used for implementing an 802.11 OFDM receiver [36].
D. Machine Learning for CR
Machine learning is becoming the cornerstone of the smart and autonomous systems. Machine learning (ML), a subset of artificial intelligence (AI), enables a system to learn, identify patterns, and make decisions without being explic- itly programmed, and with minimal or no human interven- tion [37], [38]. The basic premise of ML is to create tech- niques/algorithms that can learn from the sample input data (known as training data), by performing statistical analysis, in order to make accurate predictions or decisions on the data [38], [39]. In recent years, ML techniques are being incorporated into various fields such as medical wearables in healthcare, smart cars in transportation, and CR systems in communication [40].
There are many ML algorithms/techniques in the published literature that can be utilized for CR/SDR systems. Most of the ML algorithms/techniques can be categorized into supervised and unsupervised learning [42]. Reinforcement learning [43] is an unsupervised ML technique, where an agent (i.e., a decision maker) needs to learn and adapt to its environment with many uncertainties (i.e., with only little-known knowledge about the environment), similar to the learning and adapting in the CR systems. Due to these traits, reinforcement learning can be considered as a promising ML technique to provide the required autonomous abilities of CR systems. Several survey papers [16], [41], [48] have provided extensive discussions on different ML techniques suitable for various CR tasks, and their associated advantages and disadvantages. Some papers [50], [51] specifically surveyed the utilization of reinforcement algorithms for CR systems. The aforementioned survey papers highlight the major challenges associated with CR systems, and state the importance of providing an integrated solution to address these challenges, which currently does not exist in the published literature.
We have introduced efficient FPGA-based architectures for several ML algorithms including SVM [49], k-NN [38], ANN, and CNN. For this research, we will utilize our expertise on composing FPGA-based architectures for ML, and integrating ML with DPR to optimize complex applications.
III. ORACLE COGNITIVERADIOARCHITECTURE
We are currently working on creating an intelligent cogni- tive radio called ORACLE. In ORACLE, we will apply and modify existing reconfigurable hardware designs for building the Reconfigurable Physical Layer Baseband of a flexible
OFDM receiver, to be controlled by the ML-Based Cognition Engine. Some modifications and new designs are needed to achieve the maximal flexibility required by the use case. Top- level architecture of our ORACLE is shown in Fig. 5.
We took the NC-OFDM concept as the basis for our radios.
To facilitate this endeavor, we will explore reconfigurable hardware, different spectrum sensing techniques, quality met- rics and policy restrictions, which will feed the ML-based Cognition Engine that will attempt to maximally exploit the available radio spectrum. Dynamic frequency selection and adaptive modulation techniques will also be adopted.
Fig. 5. ORACLE architecture template.
The existing works on DPR designs (in Section II.C) only focused on some aspects of CR systems, and did not necessar- ily attempt to create a true CR as a whole. Also, the existing works did not consider merging several techniques (e.g., ML, DPR, optimization) to seek improvements in performance metrics. With ORACLE, we will explore how to integrate the DPR with various ML and other optimization techniques to further enhance the inherent traits of the CR systems.
We will create a cognition engine encompassing the ML and DPR techniques to facilitate the parametric and physical hardware reconfiguration of the CR, to achieve the highest possible performance goals. In ORACLE, we will also de- velop application-specific coarse-grained overlays for quickly adjustable blocks, e.g., to support multiple different FFT/IFFT configurations, different modulation parameters, and different lengths of serial/parallel conversions.
The existing survey papers [16], [41], [48], [50], [51]
highlight the major challenges associated with CR systems, and state the importance of providing an integrated solution to address these challenges, which currently does not exist in the published literature. With ORACLE architecture, we will be able to investigate how to incorporate ML techniques with our CE/CR tasks to create a truly intelligent CR system with self-learning and self-management traits. We will also explore how to couple ML with DPR hardware techniques to further improve these traits, while providing self-adaptive traits. In addition, we will explore the design space when creating our modules for CE to achieve highest performance goals.
IV. TECHNOLOGIES ANDCOMPONENTS OFORACLE A cognitive radio is a transceiver that demonstrates some traits of the self-aware systems. As stated in [44], self-aware computer systems should be capable of adapting their behavior and resources, quickly and automatically, in order to find the best avenue to accomplish a given (or desired) goal or task regardless of the varying environmental conditions, constraints, and demands. Based on the definition in [45], the cognitive radio has somewhat similar traits. For instance, in [46], cognitive radio is defined as “a transceiver that is (a) aware of its environment, its own capabilities, regulations governing its behavior, and its user’s needs, priorities, and limitations; (b) able to take intelligent action based on that awareness; and (c) capable of learning from experience”.
However, according to the existing work in the literature [16], [47], [48], the definition as well as the traits of the cognitive radio vary from one research community (or field) to another (i.e., from communication, networking, to computer science).
In this work, our intention is to create a cognitive radio that would encompass some of the aforementioned self-aware traits, especially, self-adaptive, self-management, and self- learning traits. With these traits, we expect our cognitive radio to support (1) autonomous, (2) mode-agile, (3) frequency- agile, and (4) spectral-efficient operations, in a real-time fashion, while considering the resource efficiency and power efficiency of the underling communication system. In this case, we expect our cognitive radio to perceive and assess the communication environment, to autonomously rationalize and learn from the perceived environment, to decide on the most efficient avenue (e.g., operation mode) for the existing environment to achieve the desired performance goals, and to efficiently reconfigure the hardware/system to physically realize the selected avenue (or mode of operation). We also expect our cognitive radio to continuously learn from the past and present experiences in order to alter the future events/operations of the communication systems. We believe such a self-learning-based autonomous reconfigurable system could lead to truly cognitive radio system.
To facilitate this endeavor, we are investigating various machine learning (ML) techniques and dynamic reconfigurable hardware (DRH) techniques, to combine and integrate these two techniques with the cognitive radio (CR) tasks and traits, and finally, to introduce a novel and unique ML-DRH-based optimized architecture for CR with the aforementioned traits.
A. Cognition Engine
The most crucial component of the cognitive radio is the cognition engine, also referred to as the cognitive en- gine [45], [46], [47]. The cognition engine is considered the brain of the CR system, thus having many important responsibilities. For instance, as stated in [46], the cognition engine is responsible for making intelligent decisions, based on the prior and current knowledge of the communication environment, and consequently reconfiguring the CR and the physical layer (PHY) and MAC layer parameters. Also, as in [45], the cognition engine coordinates the associated
components to realize the sensing, learning, and optimization, while enabling the development of new components for testing and comparison.
Our design goals were set to create the cognition engine (CE) in such a way to facilitate the self-adaptiveness, self- learning, and self-management traits of our cognitive radio.
To facilitate this, we designed our own cognition cycle for our CE, as illustrated in Fig. 6. Hence, our CE will be able to: (1) understand the corresponding communication environment. (2) self-learn autonomously (using ML techniques) from varying environmental conditions and associated operations. (3) self- decide/manage the most efficient avenue (or operation mode) considering the aforementioned conditions and operations. (4) self-reconfigure on-the-fly the corresponding hardware/system to accomplish the selected operation mode.
Fig. 6. Cognition cycle for ORACLE.
The main functions of the cognition engine (CE) are:
(1) spectrum sensing and environment perception, also making initial decisions on suitable modes, parameters, poli- cies, characteristics, etc.
(2) dynamic decision making to rationalize and finalize the decisions, and reconfigure dynamically to adjust to the selected modes, parameters, policies, etc.
(3) machine learning to learn from the past and present decisions and knowledge to improve the overall system’s performance, and
(4) information repository to store long-term information on policies, coarse geolocation, and other slowly changing environmental information.
Our proposed cognition engine is depicted in Fig. 7.
Fig. 7. Cognition engine architecture.
B. Reconfigurable Receiver and Transmitter Chains
In order for the CE to control the receiver and transmitter functionality, the transceiver has to be designed to be software- controlled. An application-specific FPGA overlay is used to enable a highly flexible and agile NC-OFDM SDR imple- mentation. The reconfigurable building blocks of the receiver, transmitter and spectrum sensing will be matched to the Cognition Engine for efficient adaptation to the radio operating environment. For a particular transceiver instance, e.g., the FFT/IFFT lengths and pruning needs, modulation / demodula- tion parameters, Cyclic Prefix lengths, and serial/parallel/serial transformation lengths have to be determined based on the chosen system parameter ranges. Two approaches can be used for reconfiguration: dynamic partial reconfiguration (DPR) or coarse-grained overlays. The coarse-grained approach is more appropriate for rapid run-time reconfiguration when there are slight parameter changes, whereas DPR approach is more suitable for replacing entire functionalities. The baseband pro- cessing chains will be instantiated on a high-capacity FPGA, and the Radio Frequency (RF) parts will be implemented on a USRP device, and will be controlled by the CE.
V. CONCLUSIONS ANDFUTUREWORK
Our proposed approach is based not only on harnessing the Machine Learning (ML) algorithms for optimizing the dynamic reconfiguration of the CR device, but also considering that the spectrum and modulation agility needed in the CR re- quire purpose-built flexible transceiver structures enabling fast run-time reconfiguration. While implementing the ORACLE architecture, there are several interesting issues that need to be investigated further. We will explore overlay architectures for spectrum sensing and application-specific coarse-grained reconfigurable building blocks, to implement flexible run-time configurable CR transmitter and receiver chains for efficient spectrum utilization. Also as future work, we need to inves- tigate and analyze different ML techniques suitable for CR cognition engine; investigate how to integrate suitable ML technique(s) with dynamic reconfigurable hardware (DRH) techniques to further optimize the inherent traits of the CR cognition engine; and finally, introduce novel and unique ML- DRH-based optimized architecture for CR cognition engine.
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