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[PENDING] An improved fault-tolerant routing algorithm for a Network-on-Chip derived with formal analysis

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Academic year: 2024

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Figure 1: Architecture of the nine routing nodes in a three-by-three mesh.
Figure 2: Illustration of a deadlock caused by a cyclic communication de- de-pendency
Figure 3: Architecture of the four routing nodes in a two-by-two mesh.
Figure 4: Illustration of the problem with the abstract model. The crossed link indicates that link from node 10 to node 00 is faulty
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