The VMM application-specific integrated circuit has been under development for the past seven years to serve as the basis for the new small wheel readout scheme. Parts of the ATLAS detector's muon trackers consist of Monitored Drift Tubes (MDTs) with a single-tube spatial resolution of 80 μm, Cathode Strip Chambers (CSCs) and for the trigger signals Resistive-Plate Chambers (RPCs) and small-strip Thin Gap Chambers (sTGCs), realized in two small wheels and two large wheels [ATLAS Collaboration, 2008]. It shows the three stations of the muon spectrometer in the forward region: End-cap Inner Large (EIL), End-cap Middle Large (EML), and End-cap Outer Large (EOL).
The detector areas of the so-called small wheel (blue rectangle) and the muonic large wheel (yellow rectangle) are shown. False traces (B and C) can be rejected in the trigger with the addition of a new small wheel. False traces (B and C) can be rejected in the trigger with the addition of New Small.
Detector Layout
Right: Schematic of the arrangement of the four multilayers of sTGC and MM detectors including support structure. According to the current structure of the MS, each wheel is composed of 16 sectors (8 small and 8 large) as shown in fig. From their small gain gap, they have fast signals on the order of 100 nanoseconds. They are a type of micropattern gas-shaped detector with a spatial resolution below a hundred micrometers Today, the use of Micromegas technology is growing over the various fields of experimental physics.
The detector's readout strips are covered by an insulator and a layer of resistive strips to protect the detector from discharges. The planes of the cathode are made of graphite-epoxy mixture and have a resistivity of 100-200 kΩ/sq. The precision strips on the outside of the cathodes and pads act as readout electrodes.
VMM (VENETIS MICRO MEGA)
VMM3 version 3 has all design features including Level-0 buffer logic and seu mitigation circuitry for configuration registers, state machines and FIFO pointers. The device will be packaged in a ball grid with dimensions consistent with the Micromegas Tape Pitch. The filter (shaper) is of the third order (one real pole and two complex conjugate poles), designed in delayed dissipative feedback (DDF). The DDF architecture offers a higher analog dynamic range, enabling relatively high resolution at an input capacitance much less than 200 pF. The complete connection diagram of these data paths with the rest of the readout and trigger components of the NSW is shown in the figure below.
In this mode, each channel of the ASIC provides 38-bit data stored in a four-event de-randomized deep FIFO. The Level-0 (L0) readout mode of the VMM is designed to be compatible with the readout scheme of the ATLAS experiment. The L0 selection logic applies a configurable delay to the trigger and forwards only hit data for which their timestamp is within a window of the trigger arrival time plus its delay offset.
This is the address (i.e. VMM channel number) of the first in time channel above threshold. The four power rails of the VMM (Vddp, Vdd, Vddad and Vddd) are independently driven by different Low Drop-Out (LDO) regulators. Three LEMO connectors provide access to the monitoring, peak detector and time detector outputs (MO, PDO, TDO respectively) of the onboard VMM.
Another memory (EEPROM) is used to store the board's media access control (MAC) and network addresses, each of which is configurable. The input protection of the VMM is implemented using control diodes in a rail-to-rail configuration along with series resistors. For example, the MMFE1 board was fabricated to validate VMM ASIC functionality using 10 × 10 cm2 Micromegas prototype chambers [7].
The trigger signal is propagated to the FPGA and to one of the VMM channels so that the ASIC can perform accurate timing.
Firmware implementation
This part of the logic deploys various sub-blocks (reading cores) that extract data from the VMM. It basically consists of a wrapper of an integrated 12-bit ADC driven by the analog outputs of the VMM. In the Config field, the user can load, set and write an xml configuration file with the VMM settings that were set in the GUI.
The Event Stop box allows the user to set the number of events to record during the run by setting -1. There is no limit to the events. So in the IPv4 field the user can specify the IP address of the VMM(FEB) board and set the address of the first FEB as well as the number of FEBs to communicate with. In the Configuration Frame, the user can select the FEB number to which he wants to send the VMM/FPGA configuration parameters.
In VMM Select, the user specifies the VMM ID to configure on the selected FEB. The user can set the maximum number of CKTKs (if in continuous readout mode) and also the frequency of CKBC (40,20 and 10 MHz CKBC frequencies are possible). The VERSO software gives the user the ability to set the global configuration registers of the VMM3.
In the Channel Registers, figure 3.12, the user can modify the settings of each of the 64 VMM channels, such as masking (SM), or enabling the test pulse circuit (ST). In xADC non-based sampling calibration type, the user can perform calibration routines based on the loop parameters at the bottom of the window (Gain, Peak Time, TAC Slope, Test Pulse DAC etc.). In newer firmware, a blinking LED pattern will appear on the onboard USER_ LEDs if the reference clock is received correctly by the FPGA.
In the newer version of the firmware, the LED pattern will also be visible for the first few seconds. In the figure below is the experimental setup for data acquisition of the VMM board. Select Calibration at the top left of the VERSO GUI, and press Start Run which is in the same area.
Program Scope
Digilents Analog Discovery 2 allows us to call specific functions that will allow us to communicate, collect data and then visualize our signals. On the first line we code a button, which when clicked calls our scope function and our program runs. These functions can be better understood from the [9] Digilents Analog Discovery 2 SDK Reference Guide. 1.)FDwfGetVersion(char szVersion[32]).
Description: Gets the version string. szVersion – Pointer to buffer to receive version string 2.)FDwfEnum(ENUMFILTER enumfilter, int *pnDevice). It must be called before using other FDwfEnum. functions because they retrieve information about enumerated entities from this list identified by the entity index.. enumfilter – Filter value to use for entity enumeration. Use constantenumfilterAll to find all compatible devices. - pnDevice – Integer pointer to return the number of devices found by reference 3.).
With channel index -1, each Analog Out channel activation will be configured to use the same new option.. hdwf – Opens the interface handle to a device. With channel index -1, any enabled Analog Out channel functions will be configured to use the same new option. With channel index -1, any enabled Analog Out channel frequency will be configured to use the same new option.. hdwf – Opens the interface handle to a device.
Voltage range to set. 10.)FDwfAnalogInBufferSizeSet(HDWF hdwf, int nSize) Description: Adjusts the AnalogIn instrument buffer size. nSize – Buffer size to set. 11.)FDwfAnalogInConfigure(HDWF hdwf, BOOL fReconfigure, BOOL fStart). For single acquisition mode, the data will be read only when the acquisition is complete. hdwf – Interface handle. - fReadData – TRUE if data is to be read. - psts – Variable to receive the acquisition status.. 13.)FDwfAnalogInStatusData( HDWF hdwf, int idxChannel, double. This copies the data samples to the provided buffer.. idxChannel – Channel index. - rgdVoltData – Pointer to allocated buffer to hold the acquisition data - cdData – Number of samples to copy.
Description: Resets and configures all AnalogOut instrument parameters (by default, with autoconfiguration enabled) to default values for the specified channel.
Testing
After calling these functions correctly, we can create our oscillator program that will allow us to see signals. In the photo above you can see that the laptop is connected to the small oscilloscope and the small oscilloscope is connected to another oscilloscope. We did this to ensure that the signals displayed on the program scope will be the same on the oscilloscope we are connected to.
First, we will send a 2.5 V test pulse from the Tektronix oscilloscope to the Discovery 2 analog oscilloscope. Looking at Figures 5.4 and 5.5, we can see that our program is reading the same 2.5 V test pulse sent from the Tektronix oscilloscope. After reading our test pulse, we are now ready to communicate with our Gpvmm board.
When using the oscilloscope it is important to correctly calibrate the trigger and its frequency, otherwise we may not capture our signal. It should be noted that we need to adjust our trigger appropriately so that we can capture our specific signal. The main reason for this program was to put this program in the verso version so that we can read our signals easily, without the need to use the larger oscilloscope.
1] Design and development of the Level1 Data Controller Card (L1DDC) for the new pinwheel upgrade of the ATLAS experiment at CERN. 4]The New Small Wheel Upgrade Project of the ATLAS Experiment Bernd Stelzer for the ATLAS Muon Collaborationa (available at www.sciencedirect.com.