Single-Stage DC-AC Converter for Photovoltaic System André Filipe Coelho Pinto
Instituto de Telecomunicações, Av. Rovisco Pais 1, 1049-001 Lisboa, Portugal Phone: +351-965974300, e-mail andre.pinto@ist.utl.pt
Abstract – Photovoltaic energy is a renewable energy source, which has gained importance in the last years, creating the need to design power electronic converters for photovoltaic systems with higher efficiency. This paper presents a DC-AC converter that joins a DC-DC converter and an inverter in a single-stage topology. This converter is based on a full bridge converter with tree level output voltage, where two diodes and one inductor have been added in order to create a Boost converter. The control system of this converter is based on a hysteretic control of the grid injected current. It was made a prototype of the converter and control system.
Keywords — Photovoltaic system, Single-Stage DC-AC Converter, Full Bridge Inverter, Boost Converter, Hysteretic Control.
I.INTRODUCTION
The relevance of energy in our lives, the increase of its consumption, the increase of the pollution, and the reduction of the fossil energy resources, has led to an orientation towards renewable energy in the last few years. Photovoltaic (PV) energy is a renewable energy source, which has gained importance in the last few years. However, the ratio price/efficiency of PV systems is currently very high, around 6 % [1], creating the need to design power electronic converters for PV systems with higher efficiency, to be profitable the investment in this technology.
The PV system is composed by one PV panel, or a set of PV panels, by one power electronic DC-AC converter, also called inverter, by an output filter, and by the electricity grid, Fig. 1.
Fig. 1 – Photovoltaic system.
In the output of the panel is placed a capacitor to do the energy decoupling between the panel and the inverter. The inverter is needed to invert the panel voltage, converting the continuous voltage and current in alternate variables, to allow the injection into the grid. The current injection into the grid by the inverter requires that the average of its output voltage is greater than the grid voltage.
In the literature there are several topologies of converter for PV systems [2] – [5]. These are classified according to the number of stages, the use, or not, of transformer, and the number of levels of the inverter output voltage. According to the number of stages, the converter can be classified as single-stage, Fig. 2 a), or as two-stages, Fig. 2 b), where uses
a DC-DC converter to elevate the voltage of the PV panel.
The topologies with transformer can raise the PV panel voltage and have galvanic isolation. Some of those topologies have high-frequency transformers and others have transformers at grid frequency, which means that it is bulkier, more expensive and has more losses. When the galvanic isolation is not necessary, transformerless topologies are used, that can have higher efficiency and its fabrication becomes more economic. According to the number of levels of the inverter output voltage, this can have two levels, or can be a multi-level voltage, when the voltage has three, or five, or seven… levels.
Fig. 2 – PV system: a)single-stage converter, b) two-stage converter.
II.TOPOLOGY
This work is based on a new converter topology for connecting a vector of PV panels to the grid, being developed by group of Sistemas Energéticos para Telecomunicações – Instituto de Telecomunicações of Lisbon. The work origins, comes from another topology developed by the same research group [6].
The topology that will be study contains a DC-DC Boost converter and a full bridge inverter at three levels, in a single-stage, Fig. 3. The Boost converter is inserted inside of the inverter, which leads to a decrease of the number of components, which decreases the level of losses, achieving an efficiency optimization.
Fig. 3 – Single-stage DC-AC converter for PV systems.
A. Inverter
The topology consists of a full bridge inverter at three levels. The vA and vB voltages are the voltage at the emitter of transistor T1 and T2 respectively, and the vAB voltage is the output voltage of the inverter. There are four possible states of operation for the transistors, Table 1.
Table 1 – States of transistors.
T1 T2 T3 T4 vAB
ILR
States VGrid> 0 VGrid< 0
off on on off ↑ ↑ s00
on off off on ↓ ↓ s01
on on off off 0 ↓ ↑ s10
off off on on 0 ↓ ↑ s11
If the grid voltage is positive, only the states s00, s10 and s11
are used. In state s00 the vAB voltage between tA and tB is , and the value of iLR current (1) is a straight line with positive slope Fig. 4, because of always being greater than the grid voltage. In states s10 e s11 the vAB voltage between tB and tC is zero, and the iLR current (2) is a straight line with negative slope.
(1)
(2)
Fig. 4 – Timing diagram of the inverter output voltage, iLR current and grid voltage.
If the grid voltage is negative, only are used states s01, s10
and s11. In state s01 the vAB voltage between tD and tE is , and the value of iLR current (3) is a straight line with negative slope. In states s10 e s11 the vAB voltage between tE and tF is zero, and the iLR current (2) is a straight line with positive slope, because the r dg i volta isge negative.
, (3)
For the inverter inject current into the grid between tA and tC, the average voltage of v must be greater than the grid voltage, so the duty c c fy le o the nvertAB i er is given by (4).
(4)
B. Boost Converter
The topology has a DC-DC Boost converter inserted inside of the inverter. The Boost converter is composed by the transistors T3 and T4, the diodes D1 and D2, the diodes that are in anti parallel with transistors T1 and T2, the inductor LP, and the PV panel. This topology allows two Boost converters, Fig. 5. The diodes D1 and D2 are used to prevent that inverter current affect the operation of the Boost converter.
PV CF
LP
T3 D1
PV CF
LP
T4 D2
Fig. 5 – Two Boost converters.
For tA < t < tB the transistor T3 is turned on and the voltage in inductor LP is equal to the voltage in the PV panel, Fig. 6.
If at instant tA the current on inductor of the Boost converter, ILP, has the value of iLP1 and the voltage on the panel is constant, the value of current ILP (5) is a straight line with positive slope that p ra t of he t initial valu ie LP1.
(5)
2
1
Fig. 6 – Timing diagram of the voltage and current in inductor of Boost converter.
For tB < t < tC the transistor T4 is turned on and the voltage on inductor LP is given by (6). If at instant tB the ILP current has the value of iLP2, and the PV voltage and voltage are constants, the value of current ILP (7) is a straight line with negative slope, because the voltage is greater than PV voltage.
(6)
(7) The average voltage in LP is zero, so the duty cycle of the converter is given by (8 . )
(8)
C. Single-Stage Converter
From the standpoint of the inverter operation, the zero in the output voltage, vAB=0, can be obtained with state s10 or s11. From the Boost operation, these two states are different.
The choice of the state s11 rise the value of the iLP current, while the state s10 brings down the value of iLP current. This degree of freedom allows to control of the Boost converter, during the zero of the inverter output voltage.
The Boost converter takes energy from the PV panel and stores it on the CF capacitor. The inverter takes the energy stored in capacitor and transfers it to the grid. Considering a system efficiency of 100 %, then any difference between the power supplied by the panel, PPV, and power delivered to the grid, PGrid, causes a disturbance in the vCF voltage. If the system is to delivered to the grid more power than what it is being extracted from the panel, PGrid> PPV, the vCF voltage will decrease. On the other hand, if the system is to be drawn from a panel more power than what is to be delivered to the grid, PPV> PGrid, the vCF voltage will increase. The value of the voltage on the CF capacitor is an indicator of energy balance of this converter, and is used in the control system to regulate the amplitude of the sinusoidal current injected into the grid by the inverter.
The current and voltage on the CF capacitor will be defined considering that the Boost converter and inverter are two independent blocks, Fig. 7. This topology is equivalent to the single-stage topology, but the analysis becomes easier.
Fig. 7 – Equivalent topology.
The iLR current have a fundamental component at 50 Hz and high frequency components due to the switching frequency of transistors. Considering only the fundamental component, the iLR current can be given by (9) and instantaneous power injected i to the grn id given by (10).
· · 1 2
(9) 1
2 2 (10)
Assuming a efficiency of 100 % on the inverter, then the power delivered to the grid will be equal to the power of the inverter input, and assuming is the voltage in the CF
capacito ,r we av : h e
· · · 1
2 1
2 2
·
2 · · 1 2 (11)
Assuming that the converter is working to obtain an energy balance, then the average current in the CF capacitor is zero.
With the CF capacitor contributing only to the alternating component of he i t I curr n , e t we have:
·
·
2 2 (12)
·
4 · · · 2 (13)
∆ 2 · ·
4 · · · (14)
It can be seen in Fig. 8, the vCF voltage oscillates around its average value, , with a frequency that is twice the grid frequency. When the value of current injected into the grid is low, the PPV> PGrid and the excess of energy is stored in the CF capacitor. When the value of current injected into the grid is high, the PG id> PPV and the energy difference is provide by the CF capa ocitrr.
10 20
Fig. 8 – Timing diagram of the iLR current and grid voltage.
D. Design Criteria
By the converter analysis, it is determined that the ability to control the iLR current in conjunction with the iLP current is dependent on the existence of a time when the output voltage of the inverter is zero, vAB=0. The operation of the Boost converter is dependent on the inverter operation, which causes the Boost duty cycle to be greater than the minimum inverter duty cycle, to allow a correction by the first during the time that vAB=0 the error in current ILP introduced during the time that vAB≠0. By (4)and ), we(8 obtain:
(15) The value of CF capacitor is obtained from the ripple of vCF
voltage:
∆ · · (16)
The range of inverter operating frequency, fI, is obtained through the evolution of ILR and the re tela d ripple, ΔiLR.
∆ ∆ ∆ (17)
∆ ·
· (18)
To VGrid=VGrid Max, obtained TImin:
∆ ·
·
1 (19)
2 ,
2
,
2
(20)
4 · ∆ · ,
2
·
· ∆ · , 2
(21)
The range of Boost operating frequency, fB, is obtained through the evolution of I and the related ripple, ΔiLP LP.
∆ ∆ ∆
·
(22)
· (23)
To VPanel=VPanel Max, obtained TBmin:
· ∆ ·
·
1 (24)
·
∆ · · (25)
III.CONTROL CIRCUIT
The converter control system is essential, because it is this that will determine what transistors that should be driving, at any time. The single-stage converter needs to control three variables: the sinusoidal current injected in the grid, iLR, the current that converter required from the PV panel, iLP, and the inverter capacitor voltage, vCF. The schematic of the control system is shown in Fig. 9.
Fig. 9 – Control circuit.
A. Control of iLR and iLP
The control of iLR and iLP currents is based on a hysteretic control [7] and [8]. The control of these currents consists in comparison with a reference current through a comparator with a hysteresis window of Δi, Fig. 10. The signals from the output of the comparator (26) and (27) are digital signals.
This topology is based on a full bridge inverter at three levels, so it is necessary to have another digital signal, , which indicates whether the grid voltage is in positive or negative half cycle (28). By controlling this variable, the converter achieves a power factor almost unitary.
Fig. 10 – Hysteretic control of iLR and iLP.
0, ∆
2
1, ∆
2
(26)
0, ∆
2
1, ∆
2
(27)
0, Rede 0
1, 0 (28)
With the three digital signals it is possible to set the states of transistors, as well as, what happens to iLR and iLP currents during those states. Table 2 shows the logical levels of the transistors gate voltages, according with , and signals.
However, there are some states where iLP current are not controlled, because the operation of the Boost converter is
dependent on the inverter operation. These correspond to states in which the transistors of the diagonals are turned on, s00 and s01. In this topology the diodes D1 and D2 have common anode, so in the transition to a new state, diode which has the lesser cathode voltage comes turned on. So, in these states the transistors T3 and T4 are turned on, increasing the iLP current.
Table 2 – Logical levels of the transistors gate voltages.
V B Q Variable states Control
T1 T2 T3 T4 iLP iLR
0 0 0 iLP < iLPref vR < 0 – ΔiLP/2
iLR < iLRref – ΔiLR/2 ↑ ↑ 0 0 1 1
0 0 1 iLP < iLPref vR < 0 – ΔiLP/2
iLR > iLRref + ΔiLR/2 ↑ ↓ 1 0 0 1
0 1 0 iLP > iLPref vR < 0 + ΔiLP/2
iLR < iLRref – ΔiLR/2 ↓ ↑ 1 1 0 0
0 1 1 iLP > iLPref vR < 0 + ΔiLP/2
iLR > iLRref + ΔiLR/2 X ↓ 1 0 0 1
1 0 0 iLP < iLPref vR > 0 – ΔiLP/2
iLR < iLRref – ΔiLR/2 ↑ ↑ 0 1 1 0
1 0 1 iLP < iLPref vR > 0 – ΔiLP/2
iLR > iLRref + ΔiLR/2 ↑ ↓ 0 0 1 1
1 1 0 iLP > iLPref vR > 0 + ΔiLP/2
iLR < iLRref – ΔiLR/2 X ↑ 0 1 1 0
1 1 1 iLP > iLPref vR > 0 + ΔiLP/2
iLR > iLRref + ΔiLR/2 ↓ ↓ 1 1 0 0
The gate voltage of transistors T3 and T4 are denied of the T1 and T2, respectively, due to the impossibility of two transistors in the same arm are simultaneous driving. With the equations of T1 (29) and T2 (30), it is possible the implementation of the transistors control in logical ports, Fig. 11.
1 · Q V · B V · Q
2 · B V · Q
(29)
B · Q (30)
Fig. 11 – Logic circuit to control the transistors.
However, the transistors have a turn off and a turn on delay time, and the logic circuit cause instant transitions. To solve this problem a circuit with a RC time constant and a diode, are added to logic circuit output, Fig. 12.
Fig. 12 – Circuit to avoid simultaneous conduction of transistors.
The instant of time T1 is from low to high level, the diode D1 is cut and the resistance R and the capacitor C introduces a time constant in the circuit. At the same time, T3 is from high to low level, where the diode D3 is turned on. This time constant prevents the conduction of transistor T1 before T3 cut.
B. Control of vCF
The control of vCF voltage is essential for the energy balance of the converter. However, it will only control the average voltage on the capacitor CF, and not the alternating component at 100 Hz present in this voltage. This requires that the controller has a low gain to 100 Hz and high gains at DC.
According to Fig. 9, the equation of the system in Laplace’s domain is given by (31). For the converter’s energy balance, the magnitude of iLR current must be equal to the amplitude of the vCTR, obtaining (32).
· (31)
·
2 · 0.325· (32)
To make the control of vCF, a controller with gain k is used, to make the system response faster. To have an attenuation of 40 dB at 10 Hz, a pole at 8 Hz is added through an RC circuit. Finally, the use of an integral controller in the system introduces a pole at the origin, which leads to a zero steady state error [9]. The block diagram of the proportional integral controller is represented in Fig. 13, and the block diagram of the system controller is represented in Fig. 14.
Fig. 13 – Block diagram of the proportional integral controller.
1
·
Fig. 14 – Block diagram of the system controller.
There are several possible locations to place the zero, and it must be in a lower frequency than the RC circuit pole,
otherwise the system becomes unstable. The zero was placed at 1.1 Hz, achieving a tradeoff between overshoot and the system response time.
The controller that was implemented in hardware is shown in Fig. 15.
Fig. 15 – Controller circuit.
Analyzing the circuit we obtain (33) and (34), and through the block diagram of t he system we obtain
4 3
(35) and (36).
·
· 4 ·1 (33)
5 · 21 5 · 21
(34)
4 3·
1
1 · 4 · (35)
1 5 · 2
1 5 · 2
(36)
C. iLR Reference
The operation of the converter in energy balance is maintained using a measure of the value of vCTR as a reference of injected current amplitude. This is achieved by multiplying the value of vCTR by a sinusoidal signal of amplitude 1, Fig. 9.
D. Security System of vCF
The control circuit also has a security system to prevent vCF
voltage exceed its limit of operation, Fig. 16. It compares the vCF voltage with a threshold that is defined by the user. When the vCF voltage is above the threshold, the converter stops to require current from the PV panel.
Fig. 16 – Security system.
IV.RESULTS
A. Simulation Results
The simulation was made in the simulator OrCAD Capture 16.0.0 PSpice A/D, for a power of 1 kW, whose scaling values of the parameters are in Table 3.
Table 3 – Topology parameters.
Parameters Values Power 1 kW
VPanel 143 V
FI max 20 kHz
FB max 10 kHz
ILR 6.15 A ΔiLR 9.75 % ΔiLP 10 %
vCF 500 V
ΔvCF 2 %
CF 640 µF LR 10.4 mH LP 14.6 mH
In Fig. 17 it can be seen that the vCF voltage stabilizes in 500 V and has a voltage ripple of 10 V. In the waveform of the grid injected current, iLR, it appears that its amplitude will depends on the vCF voltage. The grid voltage and the iLR
current have a phase difference of 180º, which indicates that converter is providing electric power to the grid. The iLP
current waveform has an average of 7 A with a ripple of 0,7 A.
Fig. 17 – Waveform of iLR blue, iLP green, vRede a violet, and vCF red.
B. Experimental Results
The experimental results were obtained for values in the input power converter of 51, 75, 102, 150, 210, 252, 285, 300, and 340 W.
In Fig. 18 are represented waveforms of the iLR current, iLRref current, and vAB voltage, which shows the three levels of the inverter output voltage.
Fig. 18 – Waveform of iLR blue 1 A/div, iLRref red 1 A/div, and vAB
violet 50 V/div.
The scheme of Fig. 19 was used to check the operation of the single-stage converter. When the converter is running, it will provide power to the load. In this case it is not necessary the power provide by the grid, and electric meter will stop counting.
VR
CF
Sigle -Stage Converter
LR
ILR 0.01
PV ILP
Control
Load
Auto-tramsformer
Electric Meter
Fig. 19 – Schematic of converter test circuit.
A experience for a power of 150W was performed, with a 300 V in vCF and 130 V in grid voltage.
In Fig. 20, Fig. 21 and Fig. 22 are shown the waveforms of iLR current, iLP current, load voltage, and vCF voltage, obtained experimentally.
Fig. 20 – Waveform of iLR blue 1 A/div, iLP green 1 A/div.
Fig. 21 – Waveform of the load voltage violet 50 V/div.
Fig. 22 – Waveform of iLR blue 1 A/div, vCF red 100 V/div.
To measure the efficiency of the converter, was made nine experimental tests for different input power converter. This measurement was made without grid voltage in the load, i.e.
the load was fed exclusively by the converter.
In Fig. 23 is represented the converter efficiency. In this chart there is an increase in the efficiency of the converter with the increase of input power, which will be maximum at 1 kW.
Fig. 23 – Efficiency of the single-stage converter.
V.CONCLUSION
This work presents a DC-AC converter for PV systems that includes a Boost converter and a full-bridge inverter in a single-stage topology. This is a transformeless topology, and has the inverter output voltage at three levels. The operation of the Boost converter is dependent on the operation of the inverter, which is controlled only in the intervals at which the output voltage of the inverter is zero. The simultaneously
51,4%
59,0%
67,9%
74,9% 77,3%
84,8% 85,1% 84,8% 86,0%
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
51 75 102 150 210 252 285 300 340
Efficiency
Input power [W]
operation is only possible, if the Boost duty cycle is greater than the minimum inverter duty cycle.
The control of this converter is based on the sinusoidal current injected in the grid, the current that converter required from the PV panel, and according to the inverter capacitor voltage. The control of these three variables is essential to maintain the operation of the converter in energy balance.
This work applied a hysteresic control for the currents, and a proportional integral controller with time constant for the inverter capacitor voltage.
To prove the theoretical concepts developed, the work ended with the test of the converter prototype to power of 51, 75, 102, 150, 210, 252, 285, 300 and 340 W, achieving a maximum converter efficiency of 86 %. Also, through an electric meter, it was shown that the converter can provide energy.
REFERENCES
[1] Johan H. R. Enslin, Mario S. Wolf, Daniel B. Snyman, and Wernher Swiegers, “Integrated Photovoltaic Maximum Power Point Tracking Converter” IEEE Transactions on Industrial Electronics, Vol. 44, no. 6, December 1997.
[2] Fritz Schimpf and Lars E. Norum, “Grid connected Converters for Photovoltaic, State of the Art, Ideas for Improvement of Transformerless Inverters”, Nordic Workshop on Power and Industrial Electronics, 2008.
[3] Soeren B. Kjaer, John K. Pedersen and Frede Blaabjerg,
“A Review of Single-Phase Grid-Connected Inverters for Photovoltaic Modules”, IEEE Transactions on Industry Applications, Vol. 41, No. 5, 2005.
[4] Denizar Cruz Martins and Rogers Demonti,
“Photovoltaic Energy Processing for Utility Connected Systems” IECON’01: The Annual Conference of the IEEE Industrial Electronics Society, 2001.
[5] Mike Meinhardt and Günther Cramer, “Multi-String- Converter: The next step in evolution of String-Converter Technology”, in Proc. 9th Eur. Power Electronics and Applications Conf., 2001.
[6] Hugo Ribeiro, Fernando Silva, Sónia Pinto, and Beatriz Borges, “Single Stage, Inverter for PV Applications with One Cycle Sampling Technique in the MPPT Algorithm” to be present in IECON Porto 2009.
[7] Kato, Toshiji and Miyao, Keiji, “Modified hysteresis control with minor loops for single-phase full-bridge inverters”, Industry Applications Society Annual Meeting 1988., Conference Record of the 1988 IEEE, Vol.1, 1988.
[8] M. M. Silva, “Introdução aos Circuitos Eléctricos e Electrónicos”, 2ª edição, Fundação Gulbenkian, 2001.
[9] Eduardo J. R. Morgado, “Controlo de Sistemas Dinâmicos – uma introdução”, AEIST, 2006.
