• Nenhum resultado encontrado

Instituto Politécnico de Tomar. Escola Superior de Tecnologia de Tomar. Departamento de Engenharia Electrotécnica ELECTRÓNICA I

N/A
N/A
Protected

Academic year: 2021

Share "Instituto Politécnico de Tomar. Escola Superior de Tecnologia de Tomar. Departamento de Engenharia Electrotécnica ELECTRÓNICA I"

Copied!
22
0
0

Texto

(1)

Instituto Politécnico de Tomar

Escola Superior de Tecnologia de Tomar

Departamento de Engenharia Electrotécnica

ELECTRÓNICA I

Trabalho Prático N.º 1

Montagens Básicas com Amplificadores Operacionais

Turma: ___

Turma: ___

Turma: ___

Efectuado

pelos

alunos:

Turma: ___

Curso:

Data:

Grupo:

2008/2009

(2)

2/5

Estudo de várias montagens com amplificadores operacionais: inversor, seguidor de tensão,

amplificador diferencial e comparador regenerativo (Schmitt trigger).

II – Material necessário

-

1 TL071

-

1 Resistência 1 k

-

1 Resistência 1,5 k

-

1 Resistência 15 k

-

1 Resistência 22 k

-

2 Resistências 47 k

-

2 Resistências 100 k

-

1 Resistência 150 k

-

1 Resistência 1 M

-

1 Potenciómetro 100 k

-

Fonte de alimentação simétrica de +15V /0 /-15V e de +5V /0

-

Gerador de sinais

-

Osciloscópio

-

Chave de fendas de ajuste

Notas: Não se esqueça que o amplificador operacional tem que funcionar sempre alimentado.

Quando iniciar uma montagem, em primeiro lugar deverá estabelecer as ligações de

alimentação do ampop. Deverá mantê-las durante todo o trabalho, uma vez que são

comuns a todas as montagens. Todas as alterações que efectuar nos circuitos deverão ser

executadas com as fontes de sinal e de alimentação desligadas. O gerador de sinal só

deverá permanecer ligado enquanto o ampop estiver alimentado. Assim, a sequência de

operações deverá ser a seguinte:

1.

Com tudo desligado, efectuar as ligações necessárias.

2.

Verificar se as ligações estão correctas, com o auxílio do docente.

3.

Ligar a fonte de alimentação.

4.

Ligar o gerador de sinal.

5.

Efectuar os procedimentos e medições necessários ao trabalho.

6.

Desligar o gerador de sinal.

7.

Desligar a fonte de alimentação.

III – Condução do trabalho

1. Compensação do “offset”

1.1.

Monte o circuito necessário (de acordo com o catálogo do fabricante) para proceder à

compensação do “offset” do ampop (TL071), com as entradas inversora e não-inversora

curto-circuitadas e ligadas à massa (0V). Não se esqueça de, em primeiro lugar, alimentar

o ampop com +15V/-15V.

1.2.

Ajuste o potenciómetro por forma a obter uma tensão de saída com valor médio de 0V.

1.3.

Mantenha as entradas curto-circuitadas mas ligue-as agora a uma tensão de 5V

DC

.

(3)

ELECTRÓNICA I

T.P. N.º 1

Ampop

3/5

2. Montagem inversora

2.1.

Estabeleça as ligações necessárias para obter uma montagem inversora com uma

resistência de entrada de 15KΩ e um ganho teórico de 10.

2.2.

Aplique na entrada do circuito uma onda sinusoidal de 50mV de amplitude com uma

frequência de 1kHz.

2.3.

Com o osciloscópio, observe simultaneamente as formas de onda da tensão de entrada e de

saída do circuito. Desenhe as formas de onda visualizadas.

2.4.

Visualize a tensão diferencial de entrada do ampop. Compare-a com o valor teórico

esperado.

2.5.

Calcule o valor do ganho de tensão real do circuito e compare-o com o ganho ideal

(teórico).

2.6.

Substitua a resistência de realimentação, R

f

, por uma resistência de 1M

e repita os pontos

2.2 a 2.5.

2.7.

Retire a resistência R

f

. Verifique e explique o que sucede à saída do circuito.

3. Seguidor de tensão

3.1.

Efectue as ligações necessárias para obter um seguidor de tensão.

3.2.

Aplique na entrada do circuito uma tensão sinusoidal com amplitude de 100mV e uma

frequência de 1kHz.

3.3.

Com o osciloscópio, observe as tensões de entrada e de saída do circuito. Desenhe as

formas de onda visualizadas. Calcule o valor do ganho de tensão real do circuito e

compare-o com o ganho ideal (teórico).

3.4.

Visualize a tensão diferencial de entrada do ampop. Compare-a com o valor teórico

esperado.

3.5.

Repita os passos anteriores, 3.3 e 3.4, mas agora com uma tensão de entrada com forma de

onda quadrada.

(4)

4/5

100

100

v

a

v

0

ΚΩ

ΚΩ

47

ΚΩ

v

b

47

ΚΩ

v

d

4.1.

Monte o circuito representado na figura.

4.2.

Recorrendo ao gerador de funções aplique na entrada v

a

um sinal sinusoidal com 1V de

amplitude e com uma frequência de 1kHz, e ligue v

b

à massa. Observe e desenhe as formas

de onda v

a

e v

o

. Compare com o valor teórico esperado.

4.3.

Repita o procedimento anterior aplicando o mesmo sinal em v

a

e 5V

DC

em v

b

.

4.4.

Repita o procedimento anterior adicionando uma componente contínua de 5V

DC

ao sinal v

a

(recorra ao botão “offset” do gerador de sinal).

4.5.

Repita o procedimento 4.3 aumentando a amplitude do sinal v

a

para 5V.

5. Comparador regenerativo (Schmitt trigger)

5.1. Execute a montagem representada na figura seguinte:

1k

100

100

v

I

v

0

ΚΩ

ΚΩ

22k

5.2.

Ajuste a tensão sinusoidal de entrada v

I

de modo a apresentar uma amplitude de 0,5V e

uma frequência de 1kHz.

5.3.

Com o osciloscópio, observe e desenhe a tensão de saída v

0

.

5.4.

Observe no osciloscópio a função de transferência v

0

(v

I

).

5.5.

Altere o valor dos componentes do circuito de modo a aumentar o intervalo de histerese.

Desenhe as formas de onda obtidas. Registe o valor dos componentes que utilizou.

(5)

ELECTRÓNICA I

T.P. N.º 1

Ampop

(6)

1

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

D

Low Power Consumption

D

Wide Common-Mode and Differential

Voltage Ranges

D

Low Input Bias and Offset Currents

D

Output Short-Circuit Protection

D

Low Total Harmonic Distortion

0.003% Typ

D

Low Noise

V

n

= 18 nV/

Hz Typ at f = 1 kHz

D

High Input Impedance . . . JFET Input Stage

D

Internal Frequency Compensation

D

Latch-Up-Free Operation

D

High Slew Rate . . . 13 V/

µ

s Typ

D

Common-Mode Input Voltage Range

Includes V

CC +

description

The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_

series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low

noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier

features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single

monolithic chip.

The C-suffix devices are characterized for operation from 0

°

C to 70

°

C. The I-suffix devices are characterized

for operation from – 40

°

C to 85

°

C. The M-suffix devices are characterized for operation over the full military

temperature range of – 55

°

C to 125

°

C.

AVAILABLE OPTIONS PACKAGE TA AT 25VIOmax°C OUTLINESMALL

(D)† CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) TSSOP PACKAGE (PW) FLAT PACKAGE (W) 10 mV TL071CD TL071CP TL071CPWLE 10 mV 6 mV TL071CD TL071ACD — — — — TL071CP TL071ACP TL071CPWLE — — 3 mV TL071BCD TL071BCP — 0°C to 10 mV TL072CD TL072CP TL072CPWLE 0°C to 70°C 10 mV 6 mV TL072CD TL072ACD — — — — TL072CP TL072ACP TL072CPWLE — — 70°C 3 mV TL072BCD TL072BCP — 10 mV TL074CD TL074CN TL074CPWLE 10 mV 6 mV TL074CD TL074ACD — — — TL074CN TL074ACN — TL074CPWLE — — 3 mV TL074BCD TL074BCN — 40°C to TL071ID — TL071IP – 40°C to 85°C 6 mV TL071ID TL072ID — — — — TL071IP TL072IP — — 85°C TL074ID TL074IN — 55°C to 6 mV TL071MFK — TL071MJG — — — – 55°C to 125°C 6 mV — TL072MFK — TL072MJG — TL072MP — — 125 C 9 mV TL074MFK TL074MJ — TL074MN — TL074MW

† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended taped and reeled (e.g., TL072CPWLE).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright  1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

(7)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

2 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

NC

2OUT

NC

2IN –

NC

1IN+

NC

V

CC+

NC

2IN+

NC

V

CC +

NC

OUT

NC

3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14

NC

1IN –

NC

1IN +

NC

(TOP VIEW)

NC

1OUT

NC

NC

NC

NC

NC

2IN+

CC

V

CC

+

V

1 2 3 4 5 6 7 14 13 12 11 10 9 8

1OUT

1IN –

1IN +

V

CC +

2IN +

2IN –

2OUT

4OUT

4IN –

4IN +

V

CC –

3IN +

3IN –

3OUT

TL074, TL074A, TL074B D, J, N, OR PW PACKAGE TL074 . . . W PACKAGE (TOP VIEW) NC – No internal connection 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14

NC

IN –

NC

IN +

NC

TL071 FK PACKAGE (TOP VIEW)

NC

OFFSET

N1

NC

NC

NC

NC

NC

OFFSET

N2

NC

CC

V

TL072 FK PACKAGE 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14

4IN+

NC

V

CC –

NC

3IN+

TL074 FK PACKAGE (TOP VIEW)

1IN

1OUT

NC

3IN–

4IN

2IN–

NC

3OUT

4OUT

2OUT

1 2 3 4 8 7 6 5

OFFSET N1

IN –

IN +

V

CC –

NC

V

CC + OUT OFFSET N2 TL071, TL071A, TL071B D, JG, P, OR PW PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5

1OUT

1IN –

1IN +

V

CC –

V

CC +

2OUT

2IN –

2IN +

TL072, TL072A, TL072B D, JG, P, OR PW PACKAGE (TOP VIEW)

symbols

+ + IN + IN – OUT IN + IN – OUT TL072 (each amplifier) TL074 (each amplifier) TL071 OFFSET N1 OFFSET N2

(8)

3

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

schematic (each amplifier)

C1 VCC + IN + VCC – 1080 Ω ÎÎÎ 1080IN – TL071 Only 6412864

All component values shown are nominal.

ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ OFFSET NULL (N1) ÁÁÁ ÁÁÁ ÁÁÁ OFFSET NULL (N2) OUT 18 pF COMPONENT COUNT† COMPONENT TYPE TL071 TL072 TL074 Resistors 11 22 44 Resistors Transistors 11 14 22 28 44 56 JFET 2 4 6 Diodes 1 2 4 Capacitors 1 2 4 epi-FET 1 2 4

(9)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

4 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC +

(see Note 1)

. . .

18 V

Supply voltage, V

CC –

(see Note 1)

. . .

– 18 V

Differential input voltage, V

ID

(see Note 2)

. . .

±

30 V

Input voltage, V

I

(see Notes 1 and 3)

. . .

±

15 V

Duration of output short circuit (see Note 4)

. . .

unlimited

Continuous total power dissipation

. . .

See Dissipation Rating Table

Operating free-air temperature range, T

A

: C suffix

. . .

0

°

C to 70

°

C

I suffix

. . .

– 40

°

C to 85

°

C

M suffix

. . .

– 55

°

C to 125

°

C

Storage temperature range

. . .

– 65

°

C to 150

°

C

Case temperature for 60 seconds: FK package

. . .

260

°

C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package

. . .

300

°

C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, or PW package

. . .

260

°

C

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC – .

2. Differential voltages are at IN+ with respect to IN –.

3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4. The output may be shorted to ground or to either supply. Temperature and /or supply voltages must be limited to ensure that the dissipation rating is not exceeded.

DISSIPATION RATING TABLE PACKAGE TA 25°C POWER RATING DERATING FACTOR DERATE ABOVE TA TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D (8 pin) 680 mW 5.8 mW/°C 33°C 465 mW 378 mW N/A D (14 pin) 680 mW 7.6 mW/°C 60°C 604 mW 490 mW N/A FK 680 mW 11.0 mW/°C 88°C 680 mW 680 mW 273 mW J 680 mW 11.0 mW/°C 88°C 680 mW 680 mW 273 mW JG 680 mW 8.4 mW/°C 69°C 672 mW 546 mW 210 mW N 680 mW 9.2 mW/°C 76°C 680 mW 597 mW N/A P 680 mW 8.0 mW/°C 65°C 640 mW 520 mW N/A

PW (8 pin) 525 mW 4.2 mW/°C 70°C 525 mW N/A N/A

PW (14 pin) 700 mW 5.6 mW/°C 70°C 700 mW N/A N/A

(10)

POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 5

electrical

characteristics,

V

C

C

±

=

±

15

V

(unless

otherwise

noted)

TL071C TL071AC TL071BC TL071I P ARAMETER TEST CONDITIONS T TL071C TL072C TL071AC TL072AC TL071BC TL072BC TL071I TL072I UNIT P ARAMETER TEST CONDITIONS TA TL074C TL074AC TL074BC TL074I UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX VIO In p ut of fset voltage VO = 0 RS = 50 Ω 25 ° C 3 10 3 6 2 3 3 6 mV VIO Inpu t o ff se t vo lt age VO = 0 , RS = 50 Ω Full range 13 7.5 5 8 m V αV IO T emperature coef ficient of input of fset voltage VO = 0, RS = 5 0 Ω Full range 18 18 18 18 µ V/ ° C I IO Input of fset current VO = 0 25 ° C 5 100 5 100 5 100 5 100 pA I IO Input of fset current VO = 0 Full range 10 2 2 2 nA I IB In p ut bias current § VO = 0 25 ° C 65 200 65 200 65 200 65 200 pA I IB Input bi as current § VO = 0 Full range 7 7 7 20 nA Common mode –12 –12 –12 –12 VIC R Common-mode inp ut voltage range 25 ° C ± 1 1 12 to ± 1 1 12 to ± 1 1 12 to ± 1 1 12 to V IC R inpu t vo lt age range 15 15 15 15 Maximum peak RL = 1 0 k Ω 25 ° C ± 12 ± 13.5 ± 12 ± 13.5 ± 12 ± 13.5 ± 12 ± 13.5 VO M Maximum eak output voltage RL ≥ 1 0 k Ω Full range ± 1 2 ± 1 2 ± 1 2 ± 1 2 V swing RL ≥ 2 k Ω F u ll range ± 10 ± 10 ± 10 ± 10 AV D Large-signal dif ferential voltage VO = ± 10 V RL ≥ 2 k Ω 25 ° C 25 200 50 200 50 200 50 200 V/mV AV D dif ferent ia l vo ltage amplification VO = ± 10 V , RL ≥ 2 k Ω Full range 15 25 25 25 V/ m V B1 Unity-gain bandwidth 25 ° C 3 3 3 3 MHz r i Input resistance 25 ° C 10 1 2 10 1 2 10 1 2 10 1 2 Ω CMRR Common-mode VIC = VIC R min, 25 ° C 70 100 75 100 75 100 75 100 dB CMRR rejection ratio VO = 0, RS = 5 0 Ω 25 ° C 70 100 75 100 75 100 75 100 dB kS V R Supply-voltage rejection ratio VC C = ± 9 V to ± 15 V , 25 ° C 70 100 80 100 80 100 80 100 dB kS V R rejection ratio ( ∆ VC C ± / ∆ VIO ) VO = 0, RS = 5 0 Ω 25 ° C 70 100 80 100 80 100 80 100 dB I C C Supply current VO = 0 No load 25 ° C 1 4 2 5 1 4 2 5 1 4 2 5 1 4 2 5 mA I C C y (each amplifier) VO = 0 , N o loa d 25 ° C 1 .4 2 .5 1 .4 2 .5 1 .4 2 .5 1 .4 2 .5 m A VO 1 /V O 2 Crosstalk attenuation AV D = 100 25 ° C 120 120 120 120 dB †All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. ‡Full range is TA = 0 ° C to 70 ° C for TL07_C,TL07_AC, TL07_BC and is TA = – 40 ° C to 85 ° C for TL07_I. §Input bias currents of a FET -input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 4. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

(11)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

6 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

electrical characteristics, V

CC

±

=

±

15 V (unless otherwise noted)

TL071M

TL074M

PARAMETER TEST CONDITIONS† TA‡A TL072M TL074M UNIT MIN TYP MAX MIN TYP MAX

VIO Input offset voltage VO = 0 RS = 50Ω 25°C 3 6 3 9 mV

VIO Input offset voltage VO = 0, RS = 50

Full range 9 15 mV

αVIO Temperature coefficient ofinput offset voltage VO = 0, RS = 50 Ω Full range 18 18 µV/°C

IIO Input offset current VO = 0 25°C 5 100 5 100 pA

IIO Input offset current VO = 0

Full range 20 20 nA

IIB Input bias current‡ VO = 0 25°C 65 200 65 200 pA

IIB Input bias current‡ VO = 0

50 50 nA

VICR Common-mode inputvoltage range 25°C ±11

–12 to 15 ±11 –12 to 15 V M i k t t RL = 10 k Ω 25°C ±12 ±13.5 ±12 ±13.5

VOM Maximum peak outputvoltage swing RL≥ 10 kΩ

Full range ±12 ±12 V

voltage swing

RL≥ 2 kΩ Full range ±10 ±10

AVD Large-signal differential VO =±10 V RL≥2 kΩ 25°C 35 200 35 200 V/mV

AVD voltage amplificationg g VO = ±10 V, RL≥2 kΩ

15 15 V/mV

B1 Unity-gain bandwidth TA = 25°C 3 3 MHz

ri Input resistance TA = 25°C 1012 1012 Ω

CMRR Common-mode rejection VIC = VICRmin, 25°C 80 86 80 86 dB

CMRR

ratio VO = 0, RS = 50 25°C 80 86 80 86 dB

kSVR Supply-voltage rejection VCC = ±9 V to ±15 V, 25°C 80 86 80 86 dB

kSVR ratio (VCC

±/∆VIO) VO = 0, RS = 50 25°C 80 86 80 86 dB

ICC Supply current (eachamplifier) VO = 0, No load 25°C 1.4 2.5 1.4 2.5 mA

VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB

† Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 4. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. ‡ All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range is

(12)

7

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

operating characteristics, V

CC

±

=

±

15 V, T

A

= 25

°

C

PARAMETER TEST CONDITIONS TL07xM ALL OTHERS UNIT PARAMETER TEST CONDITIONS

MIN TYP MAX MIN TYP MAX UNIT

SR Slew rate at unity gain VI = 10 V,

CL = 100 pF,

RL = 2 kΩ,

See Figure 1 5 13 8 13 V/µs

t Rise time overshoot VI = 20 mV, RL = 2 kΩ, 0.1 0.1 µs

tr factor I ,

CL = 100 pF,

L ,

See Figure 1 20% 20%

V Equivalent input noise RS = 20Ω f = 1 kHz 18 18 nV/√Hz

Vn voltageq RS = 20Ω

f = 10 Hz to 10 kHz 4 4 µV

In Equivalent input noisecurrent RS = 20 Ω, f = 1 kHz 0.01 0.01 pA/√Hz

THD Total harmonic distortion VIrms = 6 V, RL≥ 2 kΩ, f = 1 kHz AVD = 1, RS≤ 1 kΩ, 0.003% 0.003%

PARAMETER MEASUREMENT INFORMATION

Figure 1. Unity-Gain Amplifier

VI +

CL = 100 pF RL = 2 k VO

Figure 2. Gain-of-10 Inverting Amplifier

VI + 10 k1 kRL CL = 100 pF VO N1 100 k+ TL071 N2 1.5 kVCC – OUT IN – IN +

(13)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

8 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

IIB Input bias current vs Free-air temperature 4

vs Frequency 5, 6, 7

VOM Maximum output voltage

vs Frequency

vs Free-air temperature

5, 6, 7 8

VOM Maximum output voltage

vs Load resistance 9

vs Supply voltage 10

AVD Large signal differential voltage amplification vs Free-air temperature 11

AVD Large-signal differential voltage amplification

vs Frequency 12

Phase shift vs Frequency 12

Normalized unity-gain bandwidth vs Free-air temperature 13

Normalized phase shift vs Free-air temperature 13

CMRR Common-mode rejection ratio vs Free-air temperature 14

ICC Supply current vs Supply voltage 15

ICC Supply current y g

vs Free-air temperature 16

PD Total power dissipation vs Free-air temperature 17

Normalized slew rate vs Free-air temperature 18

Vn Equivalent input noise voltage vs Frequency 19

THD Total harmonic distortion vs Frequency 20

Large-signal pulse response vs Time 21

(14)

9

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 4

IIB– Input Bias Current nA TA – Free-Air Temperature – °C

INPUT BIAS CURRENT

vs

FREE-AIR TEMPERATURE

IBI 10 1 0.1 0.01 100 – 75 – 50 – 25 0 25 50 75 100 125 VCC±=±15 V

Figure 5

VCC± = ±5 V VCC± = ±15 V RL = 10 kTA = 25°C See Figure 2 ±15 ±12.5 ±10 ±7.5 ±5 ±2.5 0 VOM Maximum Peak Output V oltage V f – Frequency – Hz 100 1 k 10 k 100 k 1 M 10 M

MAXIMUM PEAK OUTPUT VOLTAGE

vs

FREQUENCY

ÁÁÁ ÁÁÁ VOM ÎÎÎÎÎ ÎÎÎÎÎ VCC± = ±10 V

Figure 6

10 M 1 M 100 k 10 k 1 k 100 f – Frequency – Hz VOM Maximum Peak Output V oltage V 0 ±2.5 ±5 ±7.5 ±10 ±12.5 ±15 See Figure 2 TA = 25°C RL = 2 kVCC± = ±10 V VCC± = ±5 V

MAXIMUM PEAK OUTPUT VOLTAGE

vs

FREQUENCY

ÁÁ ÁÁ ÁÁ VOM ÎÎÎÎÎ ÎÎÎÎÎ VCC± = ±15 V

Figure 7

0 ±2.5 ±5 ±7.5 ±10 ±12.5 ±15 10 k 40 k 100 k 400 k 1 M 4 M 10 M f – Frequency – Hz

MAXIMUM PEAK OUTPUT VOLTAGE

vs

FREQUENCY

VOM Maximum Peak Output V oltage V ÁÁÁ ÁÁÁ ÁÁÁ VOM VCC± = ±15 V RL = 2 kSee Figure 2 ÎÎÎÎ ÎÎÎÎ TA = – 55°C ÎÎÎÎ ÎÎÎÎ TA = 25°C TA = 125°C

(15)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

10 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 8

– 75 0 VOM Maximum Peak Output V oltage V TA – Free-Air Temperature – °C 125 ±15 – 50 – 25 0 25 50 75 100 ±2.5 ±5 ±7.5 ±10 ±12.5 RL = 10 kVCC± = ±15 V See Figure 2

MAXIMUM PEAK OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

ÁÁ ÁÁ VOM ÎÎÎÎ ÎÎÎÎ RL = 2 k

Figure 9

0.1 0 RL – Load Resistance – k10 ±15 ±2.5 ±5 ±7.5 ±10 ±12.5 VCC± = ±15 V TA = 25°C See Figure 2 0.2 0.4 0.7 1 2 4 7

MAXIMUM PEAK OUTPUT VOLTAGE

vs

LOAD RESISTANCE

VOM Maximum Peak Output V oltage V ÁÁ ÁÁ VOM

Figure 10

0 0 VOM Maximum Peak Output V oltage V |VCC±| – Supply Voltage – V 16 ±15 2 4 6 8 10 12 14 ±2.5 ±5 ±7.5 ±10 ±12.5 RL = 10 kTA = 25°C

MAXIMUM PEAK OUTPUT VOLTAGE

vs

SUPPLY VOLTAGE

ÁÁ ÁÁ ÁÁ VOM

Figure 11

– 75 1 V oltage Amplification V/mV TA – Free-Air Temperature – °C 125 1000 – 50 – 25 0 25 50 75 100 2 4 10 20 40 100 200 400 VCC± = ±15 V VO = ±10 V RL = 2 k

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

FREE-AIR TEMPERATURE

A VD Large-Signal Differential AVD

(16)

11

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

0° 45° 180° 135° 90° 1 1 f – Frequency – Hz 10 M 106 10 100 1 k 10 k 100 k 1 M 101 102 103 104 105 Differential Voltage Amplification VCC± = ±5 V to ±15 V RL = 2 kTA = 25°C Phase Shift

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE AMPLIFICATION

AND PHASE SHIFT

vs

FREQUENCY

V oltage Amplification A VD Large-Signal Differential AVD Phase Shift

Figure 12

1.02 1.01 1 0.99 0.98 1.03 0.97 – 75 0.7 Normalized Unity-Gain Bandwidth TA – Free-Air Temperature – °C 125 1.3 – 50 – 25 0 25 50 75 100 0.8 0.9 1 1.1 1.2 Unity-Gain Bandwidth VCC± = ±15 V RL = 2 k

f = B1 for Phase Shift

NORMALIZED UNITY-GAIN BANDWIDTH

AND PHASE SHIFT

vs

FREE-AIR TEMPERATURE

Normalized Phase Shift Phase Shift

Figure 13

(17)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

12 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 14

– 75 83 CMRR Common-Mode Rejection Ratio dB TA – Free-Air Temperature – °C 125 89 – 50 – 25 0 25 50 75 100 84 85 86 87 88 VCC± = ±15 V RL = 10 k

COMMON-MODE REJECTION RATIO

vs

FREE-AIR TEMPERATURE

Figure 15

0 0 |VCC±| – Supply Voltage – V 16 2 2 4 6 8 10 12 14 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 TA = 25No Signal°C No Load

SUPPLY CURRENT PER AMPLIFIER

vs

SUPPLY VOLTAGE

ICC Supply Current Per Amplifier mA ÁÁ ÁÁ CC ± I

Figure 16

– 75 0 TA – Free-Air Temperature – °C 125 2 – 50 – 25 0 25 50 75 100 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VCC± = ±15 V No Signal No Load

SUPPLY CURRENT PER AMPLIFIER

vs

FREE-AIR TEMPERATURE

ICC Supply Current Per Amplifier mA ÁÁÁ ÁÁÁ ÁÁÁ CC ± I

Figure 17

– 75 0 TA – Free-Air Temperature – °C 125 250 – 50 – 25 0 25 50 75 100 25 50 75 100 125 150 175 200 225 VCC± = ±15 V No Signal No Load TL074 TL071

TOTAL POWER DISSIPATION

vs

FREE-AIR TEMPERATURE

ÎÎÎ ÎÎÎ TL072 PD T otal Power Dissipation mW PD

(18)

13

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 18

– 75 0.85 TA – Free-Air Temperature – °C 125 1.15 – 50 – 25 0 25 50 75 100 0.90 0.95 1 1.05 1.10

NORMALIZED SLEW RATE

vs

FREE-AIR TEMPERATURE

VCC± = ±15 V RL = 2 kCL = 100 pF s µ Normalized Slew Rate V/

Figure 19

10 0 Vn Equivalent Input Noise V oltage nV/Hz f – Frequency – Hz 100 k 50 10 20 30 40 VCC± = ±15 V AVD = 10 RS = 20 TA = 25°C 40 100 400 1 k 4 k 10 k 40 k

EQUIVALENT INPUT NOISE VOLTAGE

vs

FREQUENCY

ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ nV/ Hz Vn

Figure 20

0.001 THD T otal Harmonic Distortion % 1 40 k 10 k 4 k 1 k 400 100 k f – Frequency – Hz 100 0.004 0.01 0.04 0.1 0.4

TOTAL HARMONIC DISTORTION

vs

FREQUENCY

VCC± = ±15 V AVD = 1 VI(RMS) = 6 V TA = 25°C

Figure 21

– 6 t – Time – µs 3.5 6 0 0.5 1 1.5 2 2.5 3 – 4 – 2 0 2 4 Output ÎÎÎ ÎÎÎ Input VCC± = ±15 V RL = 2 kTA = 25°C

VOLTAGE-FOLLOWER

LARGE-SIGNAL PULSE RESPONSE

CL = 100 pF ÁÁ ÁÁ VO ÁÁ ÁÁ VI Input and Output V oltages V and

(19)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

14 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

10% – 4 VO Output V oltage mV t – Elapsed Time – µs 0.7 28 0 0.1 0.2 0.3 0.4 0.5 0.6 0 4 8 12 16 20 24 VCC± = ±15 V RL = 2 kTA = 25°C tr Overshoot 90%

OUTPUT VOLTAGE

vs

ELAPSED TIME

ÁÁÁ ÁÁÁ VO

Figure 22

(20)

15

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

APPLICATION INFORMATION

Table of Application Diagrams

APPLICATION DIAGRAM PART

NUMBER FIGURE

0.5-Hz square-wave oscillator TL071 23

High-Q notch filter TL071 24

Audio-distribution amplifier TL074 25

100-kHz quadrature oscillator TL072 26

AC amplifier TL071 27

Figure 23. 0.5-Hz Square-Wave Oscillator

+ – 15 V 15 V Output 1 k9.1 k3.3 kCF = 3.3 µF RF = 100 k3.3 kTL071 f+ 1 2p RF CF

Figure 24. High-Q Notch Filter

+ R2 R1 C1 C2 R3 C3 VCC – VCC + TL071 Output Input C1+C2+C3 2 +110 pF fO+ 1 2p R1 C1 + 1 kHz R1+R2+2R3+1.5 MW 100 µF + + TL074 Output C VCC + VCC + Output B TL074 + VCC + Output A TL074 + VCC + TL074 VCC + 100 kInput 1µF 1 M100 k100 kVCC – 100 kVCC – VCC – VCC –

(21)

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

16 POST OFFICE BOX 655303

DALLAS, TEXAS 75265

APPLICATION INFORMATION

– 15 V 6 sin ωt + 6 cos ωt + 88.4 kVCC + VCC – VCC + VCC – 1N4148 18 pF 18 pF 1 k18 k (see Note A) 15 V TL072 TL072 88.4 k88.4 k18 pF 1 k18 k (see Note A) 1N4148

NOTE A: These resistor values may be adjusted for a symmetrical output.

Figure 26. 100-kHz Quadrature Oscillator

0.1 µF 0.1µF + – 10 k50100 kN1 OUT 1 MVCC + 10 k10 kTL071 N2 IN – IN +

Figure 27. AC Amplifier

(22)

TI warrants performance of its semiconductor products and related software to the specifications applicable at

the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are

utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each

device is not necessarily performed, except those mandated by government requirements.

Certain applications using semiconductor products may involve potential risks of death, personal injury, or

severe property or environmental damage (“Critical Applications”).

TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED

TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS.

Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI

products in such applications requires the written approval of an appropriate TI officer. Questions concerning

potential risk applications should be directed to TI through a local SC sales office.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards should be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance, customer product design, software performance, or

infringement of patents or services described herein. Nor does TI warrant or represent that any license, either

express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property

right of TI covering or relating to any combination, machine, or process in which such semiconductor products

or services might be or are used.

Referências

Documentos relacionados

Segundo Cheng (2007) a casa da qualidade (planejamento do produto) é utilizada para traduzir a qualidade demandada pelos clientes em requisitos técnicos do produto

Diante dos discursos levantados por tais instituições, sejam elas, os Museus, os Institutos, ou as Faculdades, a obra de Schwarz 1993, fornece amplo conhecimento sobre a formação

O TBC surge como uma das muitas alternativas pensadas para as populações locais, se constituindo como uma atividade econômica solidária que concatena a comunidade com os

1 — No transporte, arrumação, exposição e arrecadação dos produtos é obrigatório separar os produtos alimentares dos de natureza diferente, bem como proceder

Dessa maneira, os resultados desta tese são uma síntese que propõe o uso de índices não convencionais de conforto térmico, utilizando o Índice de Temperatura de Globo Negro e

Mas ele é ( verbo ser, no Presente do Indicativo ) apenas um gato e não tinha tido ( verbo ter, no Pretérito Mais-Que-Perfeito Simples do Indicativo ) tempo de aprender (

Para Piaget, a forma de raciocinar e de aprender da criança passa por estágios. Por volta dos dois anos, ela evolui do estágio sensório motor, em que a ação envolve os

Local de realização da avaliação: Centro de Aperfeiçoamento dos Profissionais da Educação - EAPE , endereço : SGAS 907 - Brasília/DF. Estamos à disposição