Nicolas dos S. Rosa1*, Márcio da S. Arantes1, Cláudio M. Toledo1 and João G. Lima2
1: Institute of Mathematics and Computer Science University of São Paulo
Av. Trabalhador são-carlense, 400, Centro, 13566-590, São Carlos, SP, Brazil e-mail: claudio@icmc.usp.br
2: Department of Electronic Engineering and Informatics University of Algarve
Campus de Gambelas 8005-139 Faro, Portugal e-mail: jlima@ualg.pt
Keywords: MATLAB/SIMULINK control systems simulation, PID controller autotuning, genetic algorithms, neural network, representative set of transfer functions
Abstract Automatic Control Systems are each time more important in all industrialized and
advanced societies. Several techniques for PID controller autotuning have been proposed since a long time ago; however, the robustness and scope of these techniques are important in which concern the practical feasibly of the method. Using a recent approach, a set of tests was performed to evaluate the generalization capacity of it. This approach evolves in a simulation environment MATLAB/SIMULINK together with an FPGA implementation. In this paper the results of this set of test are presented allowing us to evaluate the robustness and scope of the method.
Nicolas dos S. Rosa, Márcio da S. Arantes, Cláudio M. Toledo and João G. Lima
1. INTRODUCTION
Control systems are far and wide used in all modern and industrialised societies. Devices designed to control automatized tasks are present into small plants and large industrial buildings as well. As a subset of control systems we can point out the PID controllers. The popularity of these controllers is due to them simple structure, only 3 terms to tune, and a robust performance over a wide range of operation conditions. Thus, a large literature related to these controllers can be find; since the beginning of the 20th century till now, PID controllers tuning technics have experienced great developments. An overview of the advances made in this field of technology can be find in several papers, reports and books, among of them, the book “PID Control in the Third Millennium” [2] where we can find a practical source of robust and advanced solutions. A complete overview and analysis about patents, software and hardware as well simulation environments such as MATLAB/SIMULINK [3] for PID control was published [4].
Due tochanges on operation conditions and plant components aging, tuning a controller is a dynamic procedure, this means that any control system needs, in general, to be retuned during its normal running, so an adaptive control strategy is desired. Thus, the adaptive strategy adopted should accommodate adjustable parameters and a mechanism for adjusting the parameters. Therefore, the overall system, that is, the controller and the plant to be controlled, together with the mechanism for tuning the parameters, becomes nonlinear.
Our approach takes into account the adaptive control with 2 loops; one loop (linear) is composed by the normal feedback with the plant and the controller, the other one is the parameter adjustment loop (nonlinear) [5].
The increasing role played by artificial intelligence inside control systems leads to intelligent control. According to it, classical control algorithms can be combined with soft computing techniques as artificial neural networks (NN), genetic algorithms (GA) [6] or fuzzy logic. According to this approach [6] NN trained off-line were used for supplying on-line PID parameters optimized for arbitrary control criteria. The NN were used for modeling purpose and the classical GA for optimization purpose.
Because GA requires a great computational effort, (incompatible with running the control system in real time), an improvement was performed [7] by using a multi-population genetic algorithm MPGA following the evolutionary model of islands [8]; as expected, this approach [7] overcome the former one [6] in terms of GA efficiency.
No matter the kind of approach used for implementation and tuning the PID controller, the majority of them were implemented in software. In our work the MPGA is used with NN to support the PID autotuning using as platform the soft-processor NIOS II inside an FPGA board. This approach presents as advantage the possibility of the designer of embedded systems defining a specific core inside the NIOS II for his specific needs [9]. Therefore we adopt a strategy of development evolving simultaneously inside 2 contexts:
simulation context where MATLAB code together with SIMULINK models implement both loops (control loop and adaptive loop), and
digital hardware context where an FPGA board is programing.
Nicolas dos S. Rosa, Márcio da S. Arantes, Cláudio M. Toledo and João G. Lima
for its success. The environment like MATLAB/SIMULINK allows us a fast code development and result production and testing as well graphic visualizations; these issues are compulsory when we deal with control systems. Thus, the control loop together with the tuning module is presented in section 2. Our system is implemented in digital hardware, therefore, a discrete version is needed, so, this section is also devoted to discretization of the plant and the controller, after, the algorithm for FPGA implementation is deducted. Section 3 is devoted to GA, where 2 approaches are pointed out for fitness evaluation. Section 4 presents some computational results justifying the setup of a set batch of transfer functions for testing, which is developed in section 5. Finally, in section 6 we point out some conclusions and suggestions for future work. 2. PID CONTROLLER, PLANT AND DISCRETE EQUIVALENTS
In this section the problem we aim to solve is presented and the corresponding discretization is done.
First we present the control loop components, after the discretization is done , finally, the algorithm for FPGA implementation is deduct.
2.1. Control loop
In Figure 1 the control architecture is depicted for continuous time (detailed in [10]) where,
1 1 c i PI s k st and 1 , 1 10 d d f f st t D s t st ( 1)The PID auto-tuning consist on evaluating and deliver online accurate PID parameters
c i d
PID
k
t
t
optimized for a set of control criteria.Nicolas dos S. Rosa, Márcio da S. Arantes, Cláudio M. Toledo and João G. Lima
It should be considered a normal feedback loop (the block control system), and the parameter adjustment loop (tuning block) composed by modelling and optimizer blocks, as explained in [10].
Our approach can accommodate several control tuning performance measures, however, for current exemplification it was considered 2 objectives:
1. reference tracking: achieved by minimization of the integral of the time multiplied by the absolute error, ITAE
t e t dt
, e t
y t r t , with an unit step as input
R s 1
s
.
2. output disturbance rejection: achieved by minimization of the integral of the time multiplied by the absolute output y(t), ITAY
t y t dt
, with a null reference
R s 0
and a unit step added to the G(s) output.The plant under test will be linear with time delay, represented by the transfer function G(s) modelling a continuous system. The exact expression for this transfer function will be defined into subsection 2.2 where the control algorithm will be outlined.
However, since the control will be performed by a digital processor, the interface between the continuous and discrete domains should be taken into account. Thus, the plant G(s) together with both converters (the analog to digital (A/D), and the digital to analog (D/A)), is depicted in Figure 2.
Figure 2. The prototype sampled-data system.
We should compute [11] the discrete transfer function between the samples coming from the processor,
u kT
, and the samples picked up from the plant output by the A/D converter,y kT
, we will represent this transfer function by
G
d z
. The sampling time T was used for sampling procedure.The D/A converter is an electronic device called zero-order hold (ZOH) because it accepts a sample at a given instant, t kT , let call it
u kT
, and holds its output constant until the next sample is sent at t kT T . According to this procedure, the D/A converter generates a continuous signalx t
with a shape like a stair with steps wide equals to sampling time T. Therefore, the transfer function that we want evaluate,G
d z
, is the z-transform of the signal
Nicolas dos S. Rosa, Márcio da S. Arantes, Cláudio M. Toledo and João G. Lima
We can obtain [11] the discrete transfer function from the input
u kT
kT
to outputy kT
by ( 2).
1
1 d G s G z z s Z
( 2)The symbol
Z
. means that Laplace transform (expression in variable s) should be inverted to continuous time domain, after, the independent variable t will be taken for t kT and finally the z-transform is evaluated.As mentioned before, the plant under test should model a linear system with time delay; so, we rewrite G(s) as
G s e
sH s
for practical reasons.Let us assume that time delay is greater than the sampling time T:
T. We define in terms of T,
lT mT, where l is the minimum number of T needed to transcend the time delay , so:l Ceil
T
,
(Ceil round towards plus infinity). Thus, m is a fractional part of T, it can be evaluated after knowing l, and T. Finally [11] , we can deduct from ( 2):
1
1 l mTs d H s G z z z e s Z
( 3)The control technique adopted is the discrete equivalent of continuous controllers [12]; this indirect method consists in:
• Starting with a continuous time design (in this case a continuous PID controller [10]) we make a discretization to implement it into a processor; this method of design is called emulation.
The numerical integration method was used for discretization. According to this technique the integrals obtained from the differential equations are approximated by differences, leading to differences equations, which are models of discrete systems.
The approximation chosen was the bilinear transformation (also called trapezoidal integration or Tustin transformation [12]) within the numerical integrations method. Therefore, it is proved [11] that, a continuous transfer function leads to a discrete equivalent transfer function by replacing the Laplace variable s according to ( 4).
1 1
2 1
1
z
s
T
z
( 4)Thus, using the emulation design explained before, the discrete PID controller is obtained from ( 1) using ( 4):
Nicolas dos S. Rosa, Márcio da S. Arantes, Cláudio M. Toledo and João G. Lima
2
2 2 2 i i d c i i t T z t T PI z k t z t ( 5)
2
2 , 10 2 2 d d d d f f f t T z t T t D z t t T z t T ( 6)Now, we have all the blocks needed to stablish the discrete version (Figure 3) of the continuous control system presented in the bottom of Figure 1
Figure 3. Discrete version of continuous control system.
In Figure 3 we locate the signals defined in discrete time domain (k variable), which will be useful for the establishment of the algorithm. The discrete negative feedback control loop together with the z transform ( 5) ( 6), and G(z), will be used to construct the algorithm which was implemented on the processor; this procedure will be detailed in the following. Note that for simplicity purpose the d sub-index for the discrete transfer function ( 3), ( 5) and ( 6) will be suppressed.
2.2. Algorithm for discrete equivalent implementation
Based on previous work [10] this implementation will use the transfer function ( 7) which it is a good representative of first order continuous plant with time delay, FOPDT.
e s G s s a ( 7)Current work will accommodate small changes for the polo location a, simulating a ti me variant plant. Thus, taking into account the time delay , the continuous plant ( 7) leads to a discrete transfer function ( 8).
1 1 , aT amT l aT l z e G z e az ae z ( 8)Now, we have all the transfer functions needed, together with Figure 3, for the establishment of the difference equations ( 9) to ( 11) for the signals