The Mathematical Modeling

Once the parameters are defined in the chromosomes, they can be applied in an alge- braic modeling in order to obtain the optimal placement solution to given parameters and constraints. The main idea of this approach is to use a nonlinear solver to find the solution to the placement of transistors.

Figure 3.16: Width and height transistors parameters.

Figure 3.16 shows width and height parameters used in the placement constraints. For each transistori∈T, the parameterswdiandhdiare the width and height of the diffusion area whilewp_i andhp_iare the parameters for the polysilicon area. Besides, three integer parametersdraini,sourcei andgatei represent the connections of the transistors and the parametertypei is also used to indicate PMOS and NMOS transistors.

The variables Xi and Yi are the central coordinates of the transistori. Their values are given by the minimization of the objective function. The goal of the used objective function is to find the optimalXi and Yi by the minimization of the wire lengths. The specification of the objective function is given in more details in Section 3.6.3.4.

The constraints are divided in three groups: 1) Boundary Constraints, 2) Neighbor- hood Constraints and 3) Connections Constraints.

3.6.3.1 Boundary Constraints

The layout of standard-cells and macro-blocks is usually structured in rows. In these structures, layout boundaries must be regular in order to allow the connection between adjacent cells at the moment of circuit generation. Figure 3.17 illustrates the boundaries in a row-based layout.

Regions for PMOS and NMOS transistors can be determined by the implant areas and boundary constraints can be formulated according to the edges of these areas. Thus, the

Figure 3.17: A row-based boundary representation.

boundary constraints are given by B_{lef t}+ ∆_x+ 1

2W_i ≤X_i ≤B_right−∆_x−1

2W_i (3.9)

Bbottom+ ∆y+ 1

2Hi ≤Yi ≤Btop−∆y− 1

2Hi (3.10)

whereB_{lef t}, B_right, B_bottom and B_top are the edges of the placement region, ∆_x and∆_y are the minimal distances from the transistorito the boundaries, andWi and Hi are the the width and height of the transistor.

3.6.3.2 Neighborhood Constraints

Neighborhood constraints are related to the possibility to connect transistors. These constraints are separated in categories and they are responsible to give the correct distance between two adjacent transistors.

In order to verify the possibility of connection between transistors, the variableslef t, right,topandbottomare used. They are given by

lef ti = (Di+Ri∗Di)∗draini+ (1−Di+Ri∗Di)∗sourcei+Ri∗gatei (3.11) righti = (1−Di+Ri∗Di)∗draini+ (Di +Ri∗Di)∗sourcei+Ri∗gatei (3.12) topi = (Ri−Ri∗Di)∗sourcei+ (Ri∗(1−Di))∗draini+ (1 +Ri)∗gatei (3.13) bottomi = (Ri−Ri∗Di)∗draini+ (Ri∗(1−Di))∗sourcei+ (1 +Ri)∗gatei (3.14) wherei ∈ T, Ri and Di are the parameters given by the current chromosome. draini, sourcei andgatei are integer parameters related to the list of connectionsC.

Consideringκc the number of points of the connectioncand assuming thatc∈ C, it is possible to know when two transistors are connected in series or parallel. Thus, two transistors are in series wheneverκc = 2. In all other cases the transistors are in parallel or they are not connected.

From the definition of these variables, it is possible to understand how the neighbor- hood constraints are formulated. Figure 3.18 illustrates every neighborhood possibility to the horizontal placement and Table 3.2 presents the neighborhood constraints wherespis the spacing between polysilicon lines,sdcis the distance between a polysilicon line and a contact,wcis the width of a contact,sdis the spacing of two diffusion areas andsdpis the distance between a polysilicon line and a diffusion area.

Table 3.2: Horizontal neighborhood constraints.

Orientation

# Figure Parameters κc Situation Constraint R_i R_j

1 3.18(a) 0 0 = 2 righti =lef tj Xj −Xi ≥ ¹₂wpi+sp+¹₂wpj

2 3.18(b) 0 0 6= 2 righti =lef tj Xj−Xi ≥ ¹₂wpi+ 2×spc+wc+¹₂wpj

3 3.18(c) 0 0 × righti 6=lef tj Xj −Xi ≥ ¹₂wpi+sd+¹₂wpj

4 3.18(d) 1 0 × × Xj−Xi ≥ ¹₂hpi+sdp+¹₂wdj

5 3.18(e) 0 1 × × Xj−Xi ≥ ¹₂wdi+sdp+¹₂hpj

6 3.18(f) 1 1 × righti =lef tj Xj −Xi ≥ ¹₂hdi+ ¹₂hdj

7 3.18(g) 1 1 × X_j −X_i ≥ ¹₂hp_i+sp+¹₂hp_j

(a) (b) (c)

(d) (e)

(f) (g)

Figure 3.18: Horizontal neighborhood.

Neighborhood constraints are separated in categories with the effort to deal with every possible relationship between two transistors. Only horizontal constraints are discussed here but similar equations are used vertically.

Seven different constraints are shown in Table 3.2. In the case ofR_i = 0andR_j = 0, equation 1 treats situations where transistors are in series, equation 2 deals with parallel transistors and equation 3 takes situations where transistors are not connected.

The equation 3 and 4 treat situations where there are different transistor orientation parameters (Ri 6=Rj). In these cases, the sharing of diffusion areas is impossible.

When transistors are placed vertically (Ri = 1andRj = 1), the connection between two transistors is possible only iftopi = topj, righti = lef ti and bottomi = bottomj

(Equation 6). Equation 7 takes all other cases to Ri = 1 and Rj = 1, in which the connection between transistors cannot be done.

3.6.3.3 Connection Constraints

Letn be the number of connections andm the number of transistors, the position to gate, drain and source can be inserted in matrix notation to the horizontal and vertical coordinates,Qx andQy. Thus,Qx andQy aren×mmatrices where the coordinatesX

Figure 3.19: The∆_ni representation.

andY of the nets are given by

Qx(draini, i) = (1−Ri)∗Di∗(Xi−∆ni)+(1−Ri)∗(1−Di)∗(Xi+∆ni)+Ri∗Xi (3.15) Qx(sourcei, i) = (1−R_i)∗(1−D_i)∗(X_i−∆_ni)+(1−R_i)∗D_i∗(X_i+∆ni)+Ri∗X_i (3.16) Qx(gatei, i) =Xi (3.17) wherei ∈ T and∆ni is the distance from the center of the transistor to the point where the connection is located as shown in Figure 3.19. The matrix to vertical coordinatesQy

is composed based on the same idea.

3.6.3.4 The Objective Function

The goal of the proposed technique is to reduce the wire length connecting the transis- tors. Thus, the objective function is based on the connection constraints and it is obtained by

OBJ :min

X

c∈C

W_c∗S(c)

(3.18) whereS(c)is the half perimeter wire length and Wc is the weight of the connectionc.

The wire length of a connectioncis calculated by the coordinates of the points of a net in the matricesQxandQy. Then,S(c)is given by

S(c) = X

i∈T,j∈T,i6=j

HP(c, i, j)∗I(c, i)∗I(c, j) (3.19) and

HP(c, i, j) =|Qx(c, i)−Qx(c, j)|+|Qy(c, i)−Qy(c, j)| (3.20) whereI(c, i)are binary values indicating whether the wirecis connected to the transistor i. The same principle is used toI(c, j)with the connectioncand the transistorj.