A Novel Approach towards the Advancement in Implementation of the Vedic Multiplier in the Digital Signal Processing Applications

(1)

A Novel Approach towards the Advancement in

Implementation of the Vedic Multiplier in the Digital

Signal Processing Applications

Anurag Bakshi

Department of Electronics and Communication Engineering (VLSI), Suresh Gyan Vihar School of Engineering & Technology, Jaipur, Rajasthan, India

Email:anuragbakshi.vlsi@yahoo.com

Abstract – The mathematics of cosmic calculations, Vedic

mathematics: a superfast technique of making calculations where a person can attain results of very large calculations very quickly. Thus we have applied the Vedic mathematics in the proposed scheme to make the computations speedy and uncomplicated in terms of area. Use of Vedic mathematics in science and technology is far and wide. In this proposed work, we encompass the function of Vedic mathematics in a application of digital signal processing i.e. convolution. The projected effort is coded in VHDL (Very High Speed Integrated Circuits Hardware Description Language), synthesized and simulated using Xilinx ISE Design Suite 14.5.

Keywords – Vedic Multiplier, Urdhva-Triyagbhyam Sutra,

Convolution Using Vedic Multiplier, Vedic Multiplication Process.

I. I

NTRODUCTION

Convolution, in functional analysis under mathematics, is used for producing a function from two given functions, f and g, after doing a mathematical operation upon them. Generally viewed upon, convolution is a modification function that brings out the modified version of the existing functions. Upon doing convolution, the overlap area between the two functions is the amount to which the existing functions have been convoluted or translated.

It has applications that include–

Probability-

Applications where probability distribution involves the summation of two independent random variables is nothing but convolution of their individual distributions.

Statistics-

In calculating the moving average of a particular distribution of data over a given spread of values with some given or not given constraints.

Computer Vision and Image Processing-

In reducing the Gaussian blur in images and in the edge detection techniques.

Electrical

Engineering-

The attenuation or amplification of each frequency component independently of other input components is done using Convolution.

In the electronic music domain, convolution has an application in the form of rhythmic structuring of the sound or the imposition of one sound over another to form a spectral

In signal processing, convolution has got a significant application in the design and implementation of finite impulse response filters.

Generalizations of convolution have got applications in the field of numerical analysis and numerical linear algebra. Fast Convolution Algorithmsinclude

Overlap Add Method

–

The discreet convolution of a very long signal x[n] with a finite impulse response h[n] filter is done using the Overlap Add Method. It divides the whole problem into multiple convolutions of h[n] of short segments x[n].

Overlap Save Method-

Used in circular or cyclic convolutions. The idea is to compute short segments of y[n] or arbitrary length L and then to concatenate them all together.

We have acquired overlap add method of convolution to speed up the operations and implanted the projected Vedic multiplier architecture wherever essential. The works we propose encompass the embedding of the Vedic multiplier architecture in the overlap add method of convolution. So we will elucidate the sutra of vedic mathematics i.e. urdhva-triyagbhyam sutra, then Vedic multiplier architecture and the proposed convolution architecture further.

II. V

EDIC

M

ATHEMATICS

Vedic Mathematics is significantly used in the disciplines of Information Technology, Electronics and Communications, mathematics etc. From the simple most calculations to utter difficult and complex calculations concerning inter-disciplinary intervention of algorithms, usages and contributions, the principles and formulae (of Vedic Mathematics) have a very significant role to play.

The basic and the most useful, in terms of fruitful impact, implementation or usage of Vedic mathematics is in the performing of faster calculations.

(2)

Cop to be derived. It is the quick and easy imp Vedic Mathematics) and its ability to come very quickly and accurately.

Vedic mathematics is now being resea researchers and other science, technology a and engineering enthusiasts for a long period contributing to the development of techniqu of powerful algorithms using Vedic Maths.

The Urdhva-Trigkbhyam (Vertical and sutra of Vedic mathematics, traditionally multiplication of decimal numbers is used. I reduce an N×N multiplication into a structure.

The multiplication is stated by the help of an Multiplication between364 × 469:

implementation (of e to correct results searched upon by and mathematics’ riod of time and are iques and designing

s.

and Cross Wise) ally used for the d. It can effectively a 4×4 multiplier

an example:

III. P

ROPOSED

M

ULTIPLIER

The designing of Vedic Multiplie technique of digital multiplication from the conventional method of mu shift.

The basic building block of 4x4 2x2 bits multiplier which implem model. For bigger multiplier imple multiplier the 2x2 bits multiplier components which are implemented Design Suite 14.5 library. The stru design shows fastest design.

RESULT = (Q7- Q4) & (Q3- Q2) &

Fig.3. 4×4 Bits decomposed The Algorithm of 4x4 bit Vedic figure 3, which is given below

A3A2 A1A0 X B3B2 B1B0

- ---Q7 Q6 Q5 Q4 Q3 Q Fig.4. Algorithm of 4x4 bit V

ER

A

RCHITECTURE

tiplier is based on a novel n which is quite different multiplication like add and 4 bits Vedic multiplier is lemented in its structural plementation like 4x4 bits r units has been used as ted already in Xilinx ISE tructural modeling of any & (Q1-Q0)

ed Vedic Multiplier ic Multiplier is shown in

--- Q2 Q1 Q0

(3)

The simulation results for convolution us the Vedic multiplier are as follows:

IV. R

ESULTS

(4)

(5)

(6)

Cop Fig.5. Simula

(7)

The execution time of the propose convolution using Vedic multiplication compared with that of convolution w multiplication. It has been found on em

Table 7.1:

R

EFERENCES

[1] Hanuman tharafu .M.C., Jayalaxmi . H., Renuk

.M., “A high speed block convolution using A Mathematics”, IEEE internation conference

intelligence and multimedia applications, 2007 [2] Jagadguru Swami Sri Bharati Krishna Tirt Mathematics”, Motilal Banarsidas, Varanasi, In

[3] A.P Nicholas, K.R Williams, J. Pickles-Verti applications of the Vedic Mathematics Sutra, Publishers, Delhi, 2003.

[4] J.G Proakis and D.G Monalkis, Digital Macmillian, 1988.

[5] A. V. Oppenheim and R. Schafer, Discrete-Tim Englewood Cliffs, NJ: Prentice-Hall, 1975. [6] HanumantharajuM.C and Shashidhara K.S “

Architecture for FIR Filter Based on Field

Array’s”, IEEE International Conference on

Processing, Hubli, Dec 2006.

[7] Purushottam D. Chidgupkar and Mangesh

Implementation of Vedic Algorithms in Digita

[8] Madihalli J. Narasimha, “Modified Overlap-A

Convolution Algorithms for Real Signals” ,IE

Signal Process, vol. 13, no. 11, pp. 669-671, N [9] Madihalli J. Narasimha, “Linear Convolution Convolutions”, IEEE Transactions on Signal

3, pp. 173-176, Mar. 2007.

[10] Shogo Muramatsu, Hitoshi Kiya, “An Extend Save Methods for Multirate Signal Processing”

on Signal Process, vol. 45, no. 9, pp. 2376-238 [11] John W. Pierre, “A Novel Method for Calc

Sum of Two Finite Length Sequences” IE

Education, vol. 39. no. 1 , pp. 77-80, Feb 1996 [12] Jung Kap Kuk and Nam Ik Cho “Block convo

delays using fast fourier transform” in Pr

International Symposium on Intelligent Sig Communication Systems, Dec 2005.

V. C

ONCLUSION

osed method for tion algorithm is with the simple embedding Vedic

multiplier architecture for OLA, t improvement in their performance as method of implementation. The ana both multiplier architectures. .1: Shows the synthesis report of vedic multiplier

nuka R.K., Ravishankar

g Ancient Indian Vedic nce on computational

07.

irthji Maharaja,“Vedic , India, 1986.

ertically and Crosswise ra, Motilal Banarsidass

al Signal Processing.

Time Signal Processing.

S “A Novel Multiplier

ld Programmable Gate

on Signal and Image

esh T. Karad, “The ital Signal Processing”,

2004 UICEE Published

-Add and Overlap-Save

,IEEE Transactions on , Nov. 2006.

ion using Skew Cyclic al Process, vol. 14, no.

nded Overlap-Add and

ng” , IEEE Transactions

380, Sep 1997.

alculating Convolution IEEE Transactions on

96.

nvolution with arbitrary Proceedings of IEEE

Signal Processing and