TSV Spare-and-Repair

3D NoCs comprise tens or hundreds of inter-die links whose cumulated TSV faults may result in poor yield. TSV Spare-and-Replace (TSV-SnR) must ensure link reparability such that the link yield YLINK is greater than a yield target YT. Typical values for YT are well above 99%, as the compound yield of all inter-die links must be high (i.e. > 98%). Using the uncorrelated fault model, the yield of an n-bits link with r spares that can replace any faulty regular TSV can be expressed as [KM07]:

( )

7

=

−

− +

⋅ 88⋅ 9 A BBC

D +

=

r n

n j

j r n TSV j

TSV

LINK Y Y

j r

Y n 1 (V-1)

Using equation (V-1), the number of spares r per link is determined such that YLINK 7YT. In other words, the fault tolerance capabilities of TSV-SnR protected links depend exclusively on the number of spares r. Let us consider that the cumulated link yield of a 20-inter-die links 3D NoC must be at least 99%. Thus, the target yield of each link is YT=99.95% (i.e. 0.9995²⁰ ~0.99). From equation (V-1) it is determined that TSV failure rates up to dTSV=1% (i.e. YTSV=0.99) can be handled with r=3 spares/link for n=32-bits links, and r=5 spares/link for n=64-bits links.

The main question one faces when using spare-based TSV repair is how to allocate spare resources for a TSV failure rate dTSV such that the yield target is achieved and different constraints (e.g. repair fabric area or TSV count) are met. In the remaining of the section, the main focus is the optimal use of spare resources. To this end, the impact of the TSV technology on the number of spares necessary to achieve a target yield is assessed.

Let us consider an MPSoC with inter-die links having TSVs with 15µm pitch. In order to assess the impact of TSV technology, the TSV pitch pTSV is reduced from 15µm to 10µm, such that twice as many inter-die wires can be integrated without increasing the total TSV footprint. If the extra TSVs are used for increasing the throughput of each inter-die link (i.e. double link data size) then the number of links does not changes and each link must achieve its 99.95% yield target, as the overall 20 inter-die links target yield is 99% (i.e.

0.9995²⁰ ~0.99). If the TSVs are used for increasing the number of links then the link yield target increases. In this case, there are twice as many inter-die links and each link must achieve a yield target of 99.975% (i.e.

0.99975⁴⁰ ~0.99). In Figure V-1, the impact of the TSV technology on the number of spares, which is determined using equation V-1, is represented for 32-bits and 64-bits links.

0 1 2 3 4 5 6

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

TSV Failure Rate dTSV [%]

Number of Spares

32-Bits YT=99.95%

32-Bits YT=99.975%

64-Bits YT=99.95%

64-Bits YT=99.975%

Figure V-1 Number of spares for 32-bits and 64-bits inter-die links

The number of spares r increases with the number of regular TSVs, the TSV failure rate dTSV and the target yield YT. In the case of dTSV=0.1%, the 99.95% target yield is achieved using r=1 spares for n=32, and r=2 spares for n=64. The number of spares increases to r=4 for 32-bits links and r=5 for 64-bits links, when the failure rate is 1% and the target yield is 99.975% (i.e. 10 µm pitch and twice as many links / chip).

When the TSV density increases and the link width increases from 32 bits to 64 bits, the number of spares per link increases for the same target yield of 99.95% and failure rate dTSV (see 32-Bits YT=99.95% and 64-bits YT=99.95% configurations in Figure V-1). In the case of dTSV=0.3%, a total of 680 TSVs with 15µm pitch are used for 32-bit inter-die links. When the TSV density doubles, the number of 10 µm pitch TSVs necessary for 64-bit link with the same target yield increases to 1340 (i.e. less than double).

When the number of links increases, more spare TSVs could be necessary to achieve the higher 99.975%

target yield for the same failure rate dTSV (see 32-Bits YT=99.95% vs. 32-bits YT=99.975, 64-Bits YT=99.95%

vs. 64-bits YT=99.975%). For example, in the case of dTSV=0.3%, the same number of spares is necessary to achieve the target yield (i.e. 2 spares for 32 bits links, and 3 spares 64 bits links). However, in the dTSV=0.9%

case, an extra spare is necessary for both 32 and 64 bits links. Moreover, the number of TSVs necessary to achieve the target yield could exceed that of available TSVs. In the case of 32 bits links, 700 TSVs with 15 µm pitch are necessary to achieve the 99.95% target, while 1440 TSVs (i.e. more than double) are necessary for 10 µm pitch TSVs.

There are few studies that show correlations between the TSV density and the TSV failure rate. Depending on how mature the TSV technology is, increasing the TSV density could also affect the TSV failure rate dTSV. Ideally, integrating more TSVs has a negligible impact on dTSV. In order to assess the impact of dTSV, let us pessimistically consider that the TSV density and failure rates are proportional. Hence, doubling the number of TSVs per chip would double dTSV. The 32-bits inter-die link with dTSV=0.3% needs only two spares to satisfy the target yield for the 3D NoC with 20 inter-die links (i.e. 680 15µm pitch TSVs). When the TSV density doubles, the TSV failure rate is dTSV=0.6% and 64-bits links require r=4 spares for the same 3D NoC

configuration with 20 links (i.e. 1260 10µm pitch TSVs). If the number of links increases then the 99.975%

target yield is achieved by allocating r=3 spares per link (i.e. 1400 10µm pitch TSVs).

From these results it can be concluded that, in order to minimize the number of spares, the TSV-SnR strategy should be implemented for larger groups of regular TSVs (i.e. 3D NoC inter-die links should not be partitioned). Although allocating spares for more TSVs can reduce the TSV count, the TSV-SnR crossover switch size increases. This is due to the fact that, when there are fewer spares / chip, there are also more replace possibilities for each regular TSV.

In order to reduce the crossover switch complexity and minimize repair fabric area, the grouping strategy was proposed in the previous chapter. Let us consider that the n regular TSVs and r spares of each inter-die link are partitioned in g groups with n1…ng regular TSVs (i.e. n1+…ng=n) and r1…rg spares (i.e. r1+…+rg=r).

The TSV yield is given by the probability that there are up to ri faulty TSVs in each group i. Similarly to the previous case, the link yield using the uncorrelated fault model is expressed as:

( )

∏ 7

= +

=

− +

88 9 A BB

C D

−

⋅ 88⋅ 9 A BBC

D +

=

g

i r n

n j

j r n TSV j

TSV i i LINK

i i

i

i

Y i

j Y r Y n

1

1 (V-2)

In equation (V-2), when there are g groups and faults between groups are not correlated, the number of spares ri is determined such the ni regular TSV group yield is above YLINK1/g. Let us consider a 32-bits link with a target yield YT=99.95%. In Figure V-2, the number of spares for 32-bits links is represented for g=1, g=2, and g=4 groups, assuming single TSV failure rates dTSV up to 1%.

0 1 2 3 4 5 6 7 8 9

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

TSV Failure Rate dTSV [%]

Number of Spares

g=1 g=2 g=4

Figure V-2 Number of spares of 32-bits links when different grouping strategies are considered

Increasing the number of groups results in higher group yield targets that can only be achieved using more spares. When dTSV=1%, the number of spares increases from 3 to 8, as there are ri=2 spares for each group. In the g=4 case, each input signal can be mapped on three different wires: the initial regular TSV and two spares.

Hence, the crossover switch complexity is reduced compared to the g=1 case, where each signal can be mapped on four different wires: the initial regular TSV and three spares. For the 3D NoC seven-port router, an assessment of area overheads is presented in section 5.1.1.3.

In 3D NoC links, Spare-and-Replace strategies have the advantage that, as long as signal propagation through the repair fabric and PHY is less than a clock cycle, they have no effect on network performance. In the hardware implementations, crossover switches are often implemented as arrays of tri-state buffers. Hence, the extra delays due to the repair fabric are often negligible.

The evaluations above indicate a major limitation of spare-based repair: it cannot always achieve the target yield with a limited number of spares. In 3D NoC inter-die links, these limitations are alleviated using repair strategies based on serialization.