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Introduction to electromigration

The miniaturisation of SMD components was discussed previously in the introduction. The use of very small components, such as 0201 (0.6 x 0.3 mm) and 0402 (1 x 0.5 mm) sizes, was only introduced in high-reliability mass manufacturing (such as in the automotive and aerospace industry) recently. Besides the challenges in the manufacturing process and development of new required materials (such as solder paste), the reliability of the smaller solder joints are also a focus of research since it must be ensured.

Mechanical and structural studies are common regarding solder joint reliability.

Computer tomography (CT) investigations were performed to investigate voids in solder joints [5.1]. The significance of automated optical inspection (AOI) of mechanical failures was also emphasized. The effect of mechanical bending on the lead-free solder joints was researched with a modelling technique [5.2]. On the other hand, current stressing-related failures are not researched widely in the case of SMD parts. The work illustrated in this chapter aims to narrow that gap in the literature.

Electromigration (EM) can be approached as the displacement of metal atoms in a given conducting metal and alloy. The resulting effect of high current densities in metals might generate the drift of diffusing metal ions in the direction of the electron flow [5.3].

Electromigration has been known in the electronics industry for a long time. In the case of Very Large Scale Integration (VLSI) circuits it has been an issue for a long time due to the miniature size of metal interconnects (e.g. aluminium, copper-doped aluminium) and their susceptibility to electromigration. It was emphasized that design guidelines in themselves are not sufficient to prevent the issue, and characterisation of certain materials (and different deposition methods) are required in active testing to determine median time to failure (MTF) values [5.4]. Even today, new approaches are discussed to increase the electromigration robustness of VLSI circuits since the integration, and thus the current density was further increased while making interconnects wider in general or introducing new materials is no longer an option. Modern tools include proactive, adaptive routing

solutions with integrated simulation software to detect critical areas and produce on-the-fly solutions, such as redundant via insertion, length limitation or cross-sectional area widening at specific locations [5.5].

In general, higher integration levels affect discrete component packaging technologies as well; thus, high current densities and electromigration must be concerned.

The reduction of the SMD component size, solder volume size and effective conducting area results in increased current densities. The EM-induced material transport poses reliability concerns and can result in (micro)void growth [5.6, 5.7] and dissolution of the copper metallization [5.8-5.10] (at the cathode side) and short circuit by hillock formation (anode side) in SMD different packages. Also, the intermetallic compound (IMC) layer thickness was reported to be increased at the anode side [5.11, 5.12] as a result of the electron flow [5.3].

It was shown that 7.5 × 107 A/m2 [5.13] and 2× 107 A/m2 [5.14] could result in EM and a substantial increase in the thickness of the intermetallic layer and excessive voiding. However, in those studies, highly elevated temperatures of 100 °C and 160 °C were used to increase the effect of EM [5.3]. Meinshausen et al. used 1.4-1.8 × 107 A/m2 current density for electromigration-induced IML research at an ambient temperature of 100-120 °C; however, Joule heating further increased the design temperature to 130-150 °C operating temperatures [5.15]. A critical current density for polymer core chip scale packaging joint and for BGA joints with a 7.45 × 107 and 4.8 × 107 was reported, respectively [5.16]. The induced atomic flux by EM (𝐽𝐸𝑀) can be described with the following equation [5.17]:

𝐽𝐸𝑀 = 𝐶 𝐷

𝑘𝑇𝑍𝑒𝜌𝐽 (Eq. 5.1)

where C is the atomic concentration, 𝑘 is the Boltzmann's constant, T is the absolute temperature, 𝐷 = 𝐷0 𝑒−𝐸𝑎/𝑘𝑇 is the atomic diffusivity (𝐸𝑎 is the activation energy of atomic diffusion in electromigration), Z* is the effective charge number, ρ is the resistivity, and 𝐽 is the applied current density [5.18].

The most straightforward theory, which is often cited and considered for bulk materials, leads to representing the median time to failure (MTF, in hours) is the following [5.19]:

1

𝑀𝑇𝐹 = A ∙ J2∙ 𝑒𝑘𝑇𝜙 (Eq. 5.2)

where A is a constant factor involving the cross-sectional conducting area, 𝐽 [A/cm2], 𝜙 [eV] is the activation energy, k is Boltzmann’s constant, and T [K] is the temperature.

In addition to the most apparent contributors (temperature and current density), other parameters, such as the structure of the investigated metal, also highly affect the activation energy required for electromigration. Electromigration was considered previously for various cases, including different interconnects and very large-scale integration (VLSI) interconnects [5.20], a certain type of three-dimensional interconnects [5.21] and flip- chips [5.22, 5.23]. However, in several cases, the research was still performed on SnPb solders. Regarding the possible failure mode of solder lead-free joints, Chen et al. and Ceric et al. presented experiments on the EM effect in tin-based solders. According to the work, a failure in a copper interconnect develops in two phases, namely, a void nucleation phase and a void evolution phase (Fig. 5.1.).

Fig. 5.1. Resistance change due to IMC growth and voiding with two different slopes. [5.24]

In the first phase, no resistance increase is measurable. The process may be different for tin-based soldering (in which many impurities can be found compared to the bulk copper conductor). The electromigration stressing, in the beginning, increased the resistance of the bump, but in the second phase, the resistance increased steeply. For the first phase, it was referred to as IMC growth and void nucleation, while in the second phase, void formation and IMC dissolution induce significant resistance increase [5.25].

Research both in the industry and academy attempts to reduce the effects of electromigration to realise more reliable solder joints with various aspects. A real-time observation method was realised to observe electromigration in solder joints in cross- section preparations [5.26, 5.27]. In the work of Yamanaka, the underfill of flip-chip solder joints increased their EM lifetime [5.28]. The research and use of composite solder alloys (with the addition of nanoparticles and metal-oxides) are getting popular [5.29] in

different fields, including high-power electronics [5.30] and chip components [5.31]. It was found that nickel-coated nanotubes may limit EM in SAC solder joints [5.32]. The addition of Al2O3 nanoparticles to Sn58Bi low-temperature solder alloy also strengthened its EM-reliability [5.33, 5.34]. In the case of SAC305 solder balls (in this context, referring to a spherical interconnect), EM resulted in significantly thickened IML [5.35].

In an experimental solder ball-like lap solder joint configuration, EM-induced Cu6Sn5

IML growth [5.36] was detected (Fig. 5.2.).

Fig. 5.2. Changes in the intermetallic layer in lap joints after current stressing at 6 A. [5.34]

Chao et al. also showed Cu6Sn5 IML growth for lead-free micro bumps with copper under bump metallization (UBM) [5.37]. Cu6Sn5 was found to have a higher electromigration rate compared to Cu3Sn [5.38]. Because of the brittle nature of IMCs, the excessive IMC and IML formation supposedly decrease the mechanical reliability of solder joints. The proportionate volume of the IMC increases in the solder joint as the joint size decreases [5.39]. It was shown that increased EM interval reduced the shear strength of Sn3.8Ag0.7Cu solder joints, and also, the fracture type transitioned from ductile to brittle [5.40].

In my work, 0402 and 0603 sized SMD components are investigated from the aspect of electromigration. Our previous works showed that the resulting current densities in such components are in the range where EM is a high possibility [L4]. However, the literature on the electromigration behaviour of chip-sized components is still needed in greater detail, described in more depth in the following sections.