ADC – Types of Error

In an ideal ADC, the signal input is quantized in uniform steps. Uniting the middle points of all steps, a line representing this ideal response of the ADC, is traced in figure a3.2.

Figure a3.2 – Representation of a generic and ideal DAC transfer function. [30]

For a better, understanding and visualization, an ideal, 3 bit example is shown in figure a3.3.

Figure a3.3 – Representation of an ideal 3 bit DAC transfer function [30]

There are 4 types of error specifications in an ADC (excluding the ENOB already discussed). They are the offset error, the gain error, the differential non linearity error and the integral non linearity error. All these error types will now be discussed. [30]

The impact of the offset error in the ADC response is illustrated in figure a3.4.

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Figure a3.4 – ADC offset error graphical example. The line that represents the ADC ideal response is on blue and the transfer function subjected to the offset error is on black. [30]

This error is a constant vertical difference between the ideal ADC response and the ADC response that includes the offset error.

It basically means, the ADC transfer function does have uniform steps of the right size, but the transitions are done later or earlier than what should ideally happen. The first transition (lowest voltage one) of the response is misaligned by a constant value, which means all transitions are misaligned by a constant offset. This can lead to an error in the output codewords expressed in number of LSBs.

The offset error can be removed by measuring the point on which the first transition occurs (reference) and comparing it to the ideal value, correcting that difference in all future samples.

As for the gain error, its’ consequences in the ADC’s response are illustrated in figure a3.5.

Figure a3.5 – ADC gain error graphical example. The line that represents the ADC ideal response is on blue and the transfer function subjected to the gain error is on black. [30]

This type of error refers to a change of slope in the line representing the DAC response when compared to the ideal response. A change of slope is due to a change of the quantization intervals length (which ideally would be equal to q). The ADC transfer function still has uniform steps, but now they are all bigger or all smaller than what was expected, which leads to errors. The gain error can also be removed. This is done by, after having eliminated the offset error, measuring a second reference point (or points) and again “pre-distorting the analog signal”, multiplying it by a gain factor (inversely proportional to the change in slope) that will counter the slope difference in the ADC. In

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other words, what is being done is adapting the input signal to the ADC full scale, taking into account the fact that its actual response is now characterized by a line with a new slope that needs to be determined (reference points).

Regarding the DNL (Differential Non Linearity) error, an example is exposed in figure a3.6.

Figure a3.6 – ADC DNL error graphical example. The line that represents the ADC ideal response is on blue and the transfer function subjected to the DNL error is on black. [30]

In figure a3.6, the real ADC transfer function is on black. The area of the ADC response where the DNL error is introduced is surrounded by a dashed red circle. Notice the variability of the size of the steps enclosed in the red circle. [30] The DNL error introduces a non linearity in the ADC response.

What happens is, the quantization intervals can now be non uniform and be of the wrong size. This means the transitions between codewords have a random element to them. The DNL expresses the limits of that randomness in any transition. The quantization interval size should be q, which is the analog level input difference that if covered would result in a transition of 1LSB. However, each transition will possibly happen in a smaller or higher gap in tension. This difference in step length is called DNL and it is given in LSBs. The DNL error is a function of each ADC’s particular architecture and its effects are not possible to be removed.

Lastly, the impact of an INL (Integral Non Linearity) error in an ADC’s response is on figure a3.7.

Figure a3.7 – ADC INL error graphical example. Ideal response is on blue and real one is on black.

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The arrow in figure a3.7 points towards the middle of the step in the response that is furthest away from the ideal ADC response. The INL, at that point, is the horizontal gap between the blue line and a parallel line that passes through the point indicated by the arrow. The INL error is the most important ADC error of all the 4 error types presented. In reality INL error is just the name given to the accumulation of DNL errors. Note, however, that depending on the DNL errors, the total error introduced by these, in the ADC ideal response, called INL, can actually magnify or decrease as the accumulation takes place. DNL errors with the same sign add up and DNL errors with opposite signs mitigate or cancel out. The INL is thus defined as the maximum deviation from the ideal line. In other words, thinking about a transition between codewords, it is the maximum difference between the analog tension that should trigger that transition and the one that actually does due to the accumulation of DNL errors.