UNIVERSIDADEFEDERALDO RIO GRANDE DO NORTE
UNIVERSIDADEFEDERAL DORIOGRANDE DO NORTE
CENTRO DETECNOLOGIA
PROGRAMA DEPÓS-GRADUAÇÃO EMENGENHARIAELÉTRICA E DECOMPUTAÇÃO
Development of an FPGA-Based Real-Time
Power System Simulator for Traveling
Wave-Based Protective Relay Validation
Marcos Sérgio Rodrigues Leal
Supervisor: Prof. Dr. Flavio Bezerra Costa
M.Sc Dissertation presented to Graduate Program in Electrical and Computer Engi-neering (area: Automation and Systems) as part of the requirements to obtain the Master of Science degree.
Número de Ordem do PPgEEC: M559
Natal, RN, Sept 06th, 2019
Leal, Marcos Sérgio Rodrigues.
Development of an FPGA-based real-time power system simulator for traveling wave-based protective relay validation / Marcos Sérgio Rodrigues Leal. - 2019.
143 f.: il.
Dissertação (Mestrado) - Universidade Federal do Rio Grande do Norte, Centro de Tecnologia, Programa de Pós-Graduação em Engenharia Elétrica e de Computação (PPgEEC), Natal, RN, 2019. Orientador: Prof. Dr. Flavio Bezerra Costa.
1. Real-time simulation - Dissertação. 2. Hardware-in-the-loop - Dissertação. 3. EMTP program - Dissertação. 4. Traveling wave-based protection - Dissertação. 5. FPGA - Dissertação. 6. DSP - Dissertação. I. Costa, Flavio Bezerra. II. Título. RN/UF/BCZM CDU 004.383.4
Catalogação de Publicação na Fonte. UFRN - Biblioteca Central Zila Mamede
To my parents, Ana Meire Rodrigues
Leal and Adauto Borges Leal, and
my brother, Lucas Ramon Rodrigues
Leal, the reason for it all.
To God in the first place for this opportunity.
To my parents, Ana Meire Rodrigues Leal and Adauto Borges Leal, and my brother, Lucas Ramon Rodrigues Leal, the most important people of my life. I thank them for the trust and daily efforts made to support my education.
To my grandparents, Maria, Tiago, Ana ("Dona Ana") and Antônio Borges (my brother "Borjão"), good-hearted people. I thank them for their daily prayers dedicated to me.
To Albano Nascimento and Wanda Bastos, my parents from Natal, I thank them very much for the support.
To all my family, I am grateful for their support and for teaching me the true meaning of family.
To my supervisor professor Dr. Flavio Bezerra Costa for the guidance, opportunity, advisement, and support in the making of this dissertation. As my grandfather would say: "Dr. Flavio is a giant!".
To my colleagues of the ProRedes research group for their support during this journey, especially Mônica M. Leal, Rafael Lucas, Max Marques, Cícero Josean, Igor Prado, Ro-drigo Prado, Daniel Marques, Lucas Simões, Frankelene Pinheiro, Jéssika Fonseca, and Samuel.
To my friends Caniggia Diniz and Vanessa Sabucco, firstly, for being incredible people and great references, then for the provided help on the improvement of my English skills. To all my friends, especially Mônica M. Leal, Matheus Carlos, Felipe Carlos, Ví-tor Borges, João VíVí-tor, Wanderley Figueiredo, Lucas Andriel, Carlos Júnior, and Felipe Carvalho. Thank them for the support and incentive for the realization of this work.
To the Coordination for the Improvement of Higher Education Personnel (CAPES) and the National Council for Scientific and Technological Development (CNPq) for fi-nancial support.
To sum it up, to all of those who, directly or indirectly, contributed to the realization of this work.
Abstract
In this work a real-time digital simulator of power systems is implemented using a low-cost custom platform based on FPGA (field-programmable gate array) proper to per-form real-time validation of traveling-wave-based transmission line protections. The op-erational view of the simulator is introduced by means of the modeling, implementation, and simulation steps of a transmission system, which is used to highlight the simulator capability to represent high-frequency transient phenomenon taking place transmission lines. Hence, at first, the mathematical models of the power system used in the case study are presented as well as the solver design, which is developed based on the elec-tromagnetic transients program (EMTP). Then, the simulator characteristics, such as the hardware architecture, development software, communication strategies, graphical inter-face, input/output, and data export, are introduced, as well as the implementation stages of the test system. Moreover, it addresses the implementation of a relay prototype using a hardware based on DSP (digital signal processor), running an existing traveling-wave-based protection scheme, besides its closed-loop integration with the simulation. A GUI (graphical user interface) is developed to set the simulation parameters, including the con-ditions for applying an electrical fault, and to monitor the dynamic of the power system used as a case study. Off-line simulations obtained from Matlab/Simulink are used to validate the real-time results.
Keywords: Real-time simulation, hardwain-the-loop, EMTP program, digital re-lays, traveling-wave-based protection, FPGAs, DSP, RIO architecture.
Neste trabalho é proposto o desenvolvimento de um simulador digital em tempo real de sistemas de potência utilizando uma plataforma customizada de baixo custo baseada em FPGA do inglês, field-programmable gate array, adequada para realizar a validação em tempo real de métodos de proteção aplicados a linhas de transmissão baseadas em on-das viajantes. A descrição do simulador se desenvolve a partir on-das etapas de modelagem, implementação e simulação de um sistema de transmissão, que é usado para destacar a capacidade do simulador de representar fenômenos transitórios de alta freqüência em linhas de transmissão. Assim, inicialmente, o equacionamento matemático dos modelos implementados bem como o desenho geral do solver, que é desenvolvido tomando como referência o programa de transitórios eletromagnéticos (EMTP), são apresentados. Em seguida, são apresentadas as características do simulador, como a arquitetura de hard-ware, software de desenvolvimento, estratégias de comunicação, interface gráfica, mó-dulos de entrada/saída e exportação de dados, bem como os estágios de implementação do sistema de teste. Adicionalmente, neste trabalho propõe-se a implementação de um relé protótipo usando um dispositivo de hardware baseado em DSP do inglês, digital sig-nal processing, executando um esquema de proteção baseado na teoria ondas viajantes, além de sua integração em malha fechada com a simulação. Uma interface gráfica (GUI do inglês, graphical user interface) é desenvolvida para que os parâmetros de simulação sejam definidos, incluindo as condições para aplicação de faltas elétricas, e monitorar a dinâmica do sistema de potência utilizado como estudo de caso. Simulações offline obtidas do Matlab/Simulink são usadas para validar os resultados em tempo real.
Palavras-chave: Simulação em tempo real, hardware-in-the-loop, programa EMTP, relés digitais, proteção de ondas viajantes, FPGA, DSP, arquitetura RIO.
Contents
Summary i
List of Figures iv
List of Tables viii
List of Symbols ix
List of Symbols and Abbreviations ix
List of Abbreviations xi
1 Introduction 1
1.1 Electromagnetic Transients Simulation of Power Systems . . . 2
1.2 Real-Time Simulation of Electromagnetic Transients of Power Systems . 3 1.3 Digital Real-Time Simulation: Challenges . . . 5
1.4 Motivation . . . 6 1.5 Objectives . . . 6 1.6 Contributions . . . 7 1.7 Methodology . . . 7 1.8 Work Outline . . . 8 2 State-of-The-Art 9 2.1 DSP-Based Real-Time Simulators . . . 9
2.2 Supercomputer-Based Real-time Simulators . . . 10
2.3 CPU-Based Real-Time Simulators . . . 10
2.4 FPGA-based Real-Time Simulators . . . 11
2.5 Commercial Real-Time Simulators . . . 14
2.6 Summary . . . 15
3 EMTP Models of Power Systems 17 3.1 Linear Lumped Elements Modeling . . . 17
3.1.1 Generic Formulation . . . 17
3.1.2 Numerical Integration Methods . . . 18
3.1.3 Choosing The Numerical Integration Method . . . 19
3.1.4 Resistance (R) Element . . . 20
3.1.5 Inductance (L) Element . . . 21 i
3.1.8 Series RC Branch Elements . . . 24
3.1.9 Others Branches Combinations . . . 26
3.2 Switch Modeling . . . 27
3.3 Voltage Sources . . . 28
3.4 Graphic Illustration . . . 28
3.5 Transmission Lines . . . 29
3.5.1 Mathematical Formulation . . . 31
3.5.2 Solution for a Lossless Line . . . 33
3.5.3 Lossy Transmission Line Model . . . 34
3.6 Network Solution . . . 36
3.7 EMTP algorithm . . . 37
3.7.1 Parallelism to be exploited in the EMTP . . . 38
3.8 Simulation of a Single-phase Transmission System . . . 39
3.8.1 Single-phase Transmission System . . . 39
3.8.2 Offline Simulation Results . . . 42
3.9 Summary . . . 43
4 Digital Relays 45 4.1 Power System Under Study . . . 45
4.2 Relay Structure . . . 46
4.3 Analog Scaling . . . 47
4.4 Anti-Aliasing Filter . . . 48
4.5 A/D Conversion Module . . . 50
4.6 Processing Unit . . . 51
4.6.1 Phasor-Based Protection of Transmission Lines . . . 51
4.6.2 Traveling-Waves-Based Relay . . . 54
4.7 Summary . . . 60
5 Real-Time Simulator Design 63 5.1 The developed Real-Time Simulator: Physical Setup . . . 63
5.2 Hardware Architectures . . . 63
5.2.1 FPGA Architecture . . . 65
5.2.2 Single Board RIO-9637 (sbRIO-9637) . . . 67
5.2.3 TMS320F2833x . . . 69
5.3 Application Software . . . 71
5.3.1 LabVIEW . . . 71
5.3.2 Code Composer Studio - CCS . . . 71
5.4 Case Study . . . 72
5.4.1 Computational Model of the Power System . . . 72
5.5 Goals and Demands . . . 73
5.6 Numeric Representation . . . 74
5.7 Time-Step . . . 75
5.8.1 Graphical User Interface . . . 77
5.8.2 Pre-Calculation Stage . . . 78
5.8.3 Producer-Loop . . . 81
5.8.4 Consumer-Loop . . . 84
5.8.5 Receiving the Simulation Parameters . . . 84
5.8.6 EMTP Loop . . . 85
5.8.7 Traveling-Wave-Based Transmission-Line Relay . . . 97
5.9 Summary . . . 102
6 Results 103 6.1 Real-Time Simulation Validation . . . 103
6.2 Device Utilization . . . 104
6.3 Validation of the Real-Time Simulation with a Traveling-Wave-Based Transmission-lines Relay . . . 108
6.3.1 Protection Settings . . . 108
6.3.2 Case 1: Fault Far 150 km from Bus 1 . . . 109
6.3.3 Case 2: Fault Far 41 km from Bus 1 . . . 111
6.3.4 Case 3: Fault Far 40 km from Bus 1 . . . 112
6.3.5 Case 4: Fault Far 20 km from Bus 1 . . . 114
6.4 Summary . . . 115 7 Conclusion 117 7.1 General Conclusions . . . 117 7.2 Future Works . . . 118 7.2.1 Publications . . . 118 Bibliography 119
1.1 Hil setups: a) CHIL and, b) PHIL. Adapted from [Faruque et al. 2015]. . 4
3.1 Norton equivalent circuit for linear lumped elements. . . 18
3.2 Function u(t). . . 18
3.3 The resistance R element and its discrete-time model. . . 20
3.4 An inductance L element. . . 21
3.5 Norton equivalent circuit of a lumped inductance. . . 22
3.6 A capacitance C element. . . 22
3.7 Norton equivalent circuit of a lumped capacitance. . . 23
3.8 A series RL branch element. . . 23
3.9 Norton equivalent circuit of a lumped RL branch. . . 24
3.10 A series RC branch element. . . 25
3.11 Discrete circuit of a lumped RL branch. . . 25
3.12 Norton equivalent circuit of a lumped RC branch. . . 26
3.13 Switches representation. . . 27
3.14 Single-phase system. . . 28
3.15 Combination of the S and L element into a single Norton equivalent circuit. 29 3.16 Computational view of the single-phase system. . . 29
3.17 Transmission lines. . . 30
3.18 Propagation of traveling waves in transmission lines. Adapted from [Costa et al. 2017]. . . 30
3.19 Transmission line illustration. . . 31
3.20 Computational transmission line model. . . 34
3.21 Lossy transmission line approximation. . . 34
3.22 Phase-modal transformation operation. . . 36
3.23 EMTP-based program. . . 38
3.24 Single-phase transmission system. . . 40
3.25 Single-phase transmission system. . . 41
3.26 Computational form of the single-phase transmission system. . . 41
3.27 Comparing results obtained from the real-time simulator, matlab pro-gramming environment and Simulink. a) current at CB1. b) current at CB2. . . 42
3.28 Comparing results obtained from the real-time simulator, matlab pro-gramming environment and Simulink. a) current at CB1. b) current at CB2. . . 43
3.29 Comparing results obtained from the real-time simulator, matlab pro-gramming environment and Simulink. a) current at CB1. b) current at
CB2. . . 44
3.30 Comparing results obtained from the real-time simulator, matlab pro-gramming environment and Simulink. a) current at CB1. b) current at CB2. . . 44
4.1 Power system under study. . . 46
4.2 Relay building blocks. . . 47
4.3 Auxiliary potential transformer. . . 47
4.4 Auxiliary current transformer. . . 48
4.5 Low-pass filter design. . . 49
4.6 Bode diagram presenting magnitude and phase response of a Butterworth filter: a) depicts the filter magnitude response; b) illustrates the filter phase response. . . 49
4.7 Current monitored at filter input and output. . . 50
4.8 Illustration of the sampling and hold process regarding the A/D conver-sion module. . . 51
4.9 Module estimation of the current phasor (|IA,S|) measured by relay 1 (Fig-ure 4.1) of the power system under study. . . 53
4.10 Phase estimation of the current phasor (φ(IA,S)) measured by relay 1 (Fig-ure 4.1) of the power system under study. . . 53
4.11 The trajectory followed by the relative impedance (ZR) on the Z plane. . . 54
4.12 Relay building blocks. . . 56
4.13 Lattice diagram illustrating the traveling waves propagation in a transmis-sion line right after the occurrence of an internal fault at the time tF. . . . 56
4.14 Protected, uncertainty, and unprotected zones. . . 58
4.15 Simulation results regarding the operation of a traveling-wave-based re-lay: cases a), b), and c) illustrate the current at the relay 1 input, the wavelet coefficient calculated by its detection unit, and the trip signal, determined after the traveling wave detection and according to the pro-tection equation; cases d), e), and f) illustrate those results considering relay 2. . . 60
4.16 Closer view on the simulation results regarding the operation of a traveling-wave-based relay. . . 61
4.17 Closer view on the simulation results regarding the operation of a traveling-wave-based relay. . . 62
5.1 Physical setup of the real-time simulator. . . 64
5.2 Hardware devices used in the real-time simulator design. . . 64
5.3 Illustration of modern FPGAs configuration. . . 66
5.4 Illustration of modern FPGAs configuration. . . 66
5.5 RIO technology. . . 67
5.6 Features of the SbRIO-9637 controller board. . . 68
5.10 Standard 32-bit IEEE single-precision format. . . 74
5.11 RTS programming structure. . . 76
5.12 RTS programming structure. . . 77
5.13 Computational model of the power system . . . 80
5.14 DMA channel. . . 81
5.15 DMA channel. . . 82
5.16 Queue structure. . . 82
5.17 Read/Write control function. . . 83
5.18 Phasor Estimator. . . 84
5.19 Distance Protection. . . 84
5.20 Updating the graphic indicators. . . 85
5.21 Diagram illustrating the logic implemented to receive the simulation pa-rameters. . . 86
5.22 Diagram of an EMTP-type algorithm. . . 87
5.23 Voltage source unit. . . 87
5.24 Auxiliary transmission line unit (ATLU). . . 88
5.25 Auxiliary unit for one transmission line. . . 89
5.26 Transmission line unit (TLU). . . 89
5.27 Transmission line model. . . 90
5.28 Lumped Element Unit (LEU)/Network Reduction Unit (NRU). . . 91
5.29 Lumped Element Unit (LEU). . . 91
5.30 Network Solution Unit (NSU). . . 92
5.31 Subsystem 1. . . 93
5.32 Subsystem 2. . . 93
5.33 Subsystem 3. . . 94
5.34 Trip logic selection unit. . . 94
5.35 Trip logic selection unit. . . 95
5.36 Fault logic unit. . . 96
5.37 Current measurement unit. . . 96
5.38 General relay structure . . . 98
5.39 Acquiring Data . . . 100
5.40 Detection Method . . . 101
5.41 Protection method . . . 101
5.42 GPIO setting. . . 102
6.1 Power system under study. . . 103
6.2 General results obtained from the real-time simulator and the ones ob-tained from Matlab/Simulink. a) current at CB1. b) current at CB2. c) voltage at bus 1. d) voltage at bus 2. . . 105
6.3 A closer view of the results generated using the real-time simulator and the ones obtained from Matlab/Simulink. a) current at CB1. b) current at CB2. c) voltage at bus 1. d) voltage at bus 2. . . 106
6.4 A closer view of the results generated using the real-time simulator and the ones obtained from Matlab/Simulink. a) current at CB1. b) current at CB2. c) voltage at bus 1. d) voltage at bus 2. . . 107 6.5 Protected, uncertainty and unprotected zones. . . 109 6.6 Results obtained from the implemented hardware-in-the-loop setup
con-sidering a fault taking place the transmission line far 150 km from bus 1. . . 111 6.7 Results obtained from the implemented hardware-in-the-loop setup
con-sidering a fault taking place the transmission line far 41 km from bus 1. . 113 6.8 Results obtained from the implemented hardware-in-the-loop setup
con-sidering a fault taking place the transmission line far 40 km from bus 1. . 114 6.9 Results obtained from the implemented hardware-in-the-loop setup
1.1 The classification of electromagnetic transients in power systems. . . 2
2.1 Summary of the literature review related to the real-time simulation of electric power systems. . . 16
3.1 Summary of some EMTP lumped models using the backward Euler method. 26 3.2 Summary of the some EMTP lumped models using trapezoidal method. . 27
3.3 Power System Parameters. . . 40
3.4 Parameters of the computational model (∆t = 20µs and dF = 200 km). . . 41
5.1 CPU specifications. . . 68
5.2 FPGA specifications. . . 68
5.3 Analog input characteristics. . . 69
5.4 Analog output characteristics. . . 69
5.5 3.3 V digital I/O . . . 69
5.6 Pre-calculation required for the Lumped elements model. . . 78
5.7 Pre-calculation required for the transmission line model. . . 79
5.8 Protection System Parameters. . . 98
5.9 Registers Configuration. . . 99
6.1 Device Utilization. . . 104
7.1 Publications. . . 118
List of Symbols
∆t Time step R Lumped resistance L Lumped inductance C Lumped capacitance RL Resistive-inductive branch RC Resistive-capacitive branch RLC Resistive-inductive-capacitive branch i Current v VoltageReq Equivalent Resistance
I(t − ∆t) Historic current
G Conductance
tOp Opening time
tCl Closing time
Zeq Characteristic equivalent impedance
I(t − τ) Historic current of the transmission line model
τ traveling wave propagation time
ω frequency variable
z(ω) Series impedance
y(ω) Shunt admittance
r resistance per unit of length
l inductance per unit of length
g conductance per unit of length
c capacitance per unit of length
Yc Characteristic admittance
Zc Characteristic impedance
γ Propagation function
α Attenuation factor
β Phase constant
d Transmission line length
Yeq Characteristic equivalent admittance
h Constant
T Clark’s matrix
Y Admittance matrix of the power system So Operation vector
SR Restriction vector
ZN Line impedance
ZR Relative impedance
f Power system operational frequency fs Sampling frequency
dF Fault distance
c Speed of light
vt Traveling wave velocity for a lossless line sx Scale coefficient
wx Wavelet coefficient nφ,F Fault inception angle Te Execution time
List of Abbreviations
ASICs Application specific integrated circuits ADC Analog to digital converter
AI Analog input
ALTU Auxiliary transmission line unit
AO Analog output
CB Circuit breaker
CCVT Capacitor voltage transformer CHIL Controller hardware-in-the-loop
CLB Configurable logic block
CMU Current measurement unit
COTS Commercial-off-the-shelf computer CPU Central processing unit
CT Current transformer
DAC Digital to analog converter
DFT Discret Fourier Transform
DIO Digital input/output
DMA Direct memory access
DSC Digital signal controller DSP Digital signal processor
EMT Electromagnetic transient
EMTP Electromagnetic transients program FACTS Flexible ac transmission systems FIFO First-input-first-output
FL Fault logic unit
FPGA Field programmable gate array GPIO General-purposed-input-output
GPP General-purpose processor
GUI Graphical user interface
HiL Hardware-in-the-loop
HuT Hardware-under-test
HVDC High voltage direct current transmission system
LEU Lumped element unit
LUT Lookup tables
MOV Metal Oxide Varistor
NRU Norton reduction unit
PWM Pulse width modulation
R&D Research and development
RIO Reconfigurable Input/Output
RTS Real-time simulator
SOP Sum of product
SR Shift register element
STARTCOM Reactive power compensator system
SW Switch element
TL Trip logic selection unit
TLU Transmission line unit
TNA Transient network analyzer
VHSIC Very-high-speed integrated circuit
VSC Voltage source converter
Chapter 1
Introduction
The current power system environment is becoming more and more complex. The hosting to the electrical network of subsystems and equipment such as renewable genera-tion systems (e.g., solar and wind power plants) and high voltage direct current (HVDC) transmission systems, besides the own growth in size of existing electrical network, has driven the R&D teams (research and development) to study and develop new technologies aiming to ensure the operational conditions of the power system and comply the safety, reliability and efficiency requirements.
Protection and control systems are among the fields that most have had advances in the context of modern power systems. The protection scenario includes the development of relays with rapid decision making such as the traveling-wave based relays of trans-mission lines, which is designed to operate based on the arrival of the voltage/current traveling waves at the line terminals and to provide fault diagnoses in the order of few ms (e.g., the relay SEL-T400L lasts 1ms to act). For this application, the protection system needs to operate at a high sampling frequency (e.g., the SEL-T400L operates at 1MHz). It needs to be able to describe fault transients accurately. In this context, it is essential to perform EMTs (electromagnetic transient) studies due to uncontrolled switching events, such as faults in transmission lines, especially in the sense of the fault detection meth-ods, where the magnitude of high-frequency components can be used as a fault identifier [Costa 2014].
In addition to the protection area, there are many other important topics straight re-lated to EMTs analysis, such as energy quality studies and insulation coordination, deter-mination of component ratings, surge arrester influences, precise deterdeter-mination of short circuits [Mahseredjian et al. 2009]. EMT studies, indeed, are essential and have sup-ported analytically the development of technologies and, consequently, the power system modernization process.
Conceptually EMTs are defined as temporary overvoltages and overcurrents caused by a change in the power system topology due to controlled and uncontrolled switching events, lighting strike, and other disturbances [Dommel and Meyer 1974]. It can span in a wide range of frequency, from DC to several MHz [Chen 2012].
Table 1.1 summarizes the classification of transient phenomena in power systems, the comprised frequency range, and examples [Mahseredjian et al. 2009]. Faults taking place a transmission line fall into the list of uncontrolled events, thereby, the analysis of voltage and current waveforms during the transient state may reveal frequency components up to 20 kHz. The possibility of representing these frequency content, i.e., the reproduction of the transient regime with the desired precision, pave the way for developing new studies and technologies which take into account information contained in that time window.
Table 1.1: The classification of electromagnetic transients in power systems.
Transients Frequency range Examples
Very fast front 100 kHz to 50 MHz EMTs due to restrikes in gas insu-lated substations
Fast front 10 kHz to 3 MHz EMTs due to lighting strokes
Slow front fundamental to 20 kHz EMTs due to switching events.
E.g., faults in transmission lines
Temporary Up to 1 kHz EMTs due to open line
energiza-tion, load-shedding
1.1
Electromagnetic Transients Simulation of Power
Sys-tems
The difficulty for conducting tests of the operating power system, as well as its non-viability (costly and time-consuming tasks), motivated researchers to develop platforms designed to imitate, for an implemented model, the real system’s behavior. [Dommel 1969] reported the fundamental theory regarding modeling and computational solution for the time-domain calculation of EMTs in power systems, the EMTP program, which is built by taking advantage of the possibility to represent mathematically the power system elements in the form of equivalent circuits, basically composed of sources and resistances, and from using the nodal analysis technique. The off-line EMT simulation software pack-ages such as ATP, PSCAD/EMTDC, EMTP-RV, MICROTRAN, NETOMAC, etc., are re-ferred to EMTP-type due to their structure be designed based on the theory presented in [Dommel 1969].
The possibility to reproduce EMTs of a power system, considering a range of situa-tions, have made simulation platforms essential tools to carry out performance evaluation of protection and control methods, i.e., before being embedded in the commercial equip-ment hosted in the real system. These simulation tools fall into offline and real-time cat-egories. The offline simulation environments are commonly used in applications where the time constraint is not a determining factor, e.g., a simulator can spend 1 h to compute 2 s of a power system’s behavior. One of the benefits of this approach is the possibility of using more complex models. The real-time simulation platforms of power systems are commonly used where compliance with simulation time is essential, e.g., a real-time
CHAPTER 1. INTRODUCTION 3
simulator will spend 2 s to compute 2 s of a power system’s behavior. This approach can be used to place the simulator linked with another system operating in real-time, such as a physical subsystem, equipment (e.g., a relay) or hardware device (e.g., a prototype relay). Therefore, real-time simulation platforms enable performing studies in a more realistic scenario.
1.2
Real-Time Simulation of Electromagnetic Transients
of Power Systems
Real-time digital simulation of power systems is a method based on a time-domain solution which generates results in synchronism with the real-world clock time reproduc-ing accurately the dynamics of the real system bereproduc-ing modeled [Faruque et al. 2015], i.e., for a common starting point of the real power system and its computational form imple-mented in a real-time simulator (e.g., the steady state), the behavior of both must match and the results (measurements of voltage and current) can be monitored, in synchronism, as time goes by. Real-time digital simulators (RTSs) have been widely used in power sys-tems and power electronics as tools for designing, performing analysis of electromagnetic transients, and for tests of control and protection schemes [Guillaud et al. 2015].
One of the main reasons justifying the use of real-time simulation tools applied to electrical systems is the possibility of conducting real-time studies using the hardware-in-the-loop (HiL) setup, in which the simulator is linked, in a closed-loop, with physical devices (a hardware-under-test, HuT). Consequently, several applications can be covered using this mode. For instance, using such configuration it is possible to carry out tests in real-time of commercial relays or prototypes implemented in a hardware device. Fur-thermore, the possibility to perform simulation of high-frequency phenomenon of power systems, in a general context, pave the way for developing and test new control and pro-tection schemes such as the traveling-wave based propro-tection methods. Therefore, new protection and control algorithms can be validated and tested from a perspective closer to reality.
The HiL configuration can be classified based on the occurrence of power transfer to or from the HuT as CHIL (controller in-the-loop) and PHIL (Power hardware-in-the-loop). The CHIL nomenclature is used when the simulator interacts with the con-troller board by means the exchange of I/O signals, i.e., no power transfer takes place. On the other hand, the PHIL nomenclature is used when there is power transfer to or from the HuT [Faruque et al. 2015]. In this case, a power processing interface is required, as well as an external source (generating or absorbing power). The signals from the simulator are used as a reference, amplified and applied to the equipment under test (e.g., testing ma-chines). Figure 1.1 depicts such a classification. The challenging configuration of today, referenced as hybrid simulation, is based on the closed-loop link established between a simulated system and a physical analog subsystem. In [Mao et al. 2018] is presented an interfacing system for a hybrid simulator.
Digital real-time simulator
Controller board (HuT)
A/D and D/A conversion Feedback signals Feedback signals Control signals Control signals
Digital real-time simulator
Power hardware (HuT) Forward signals D/A
~ ~
A/D Sensor Feedback signals a) b) Amplifier Power interface CHIL PHILFigure 1.1: Hil setups: a) CHIL and, b) PHIL. Adapted from [Faruque et al. 2015].
Besides HiL approach, real-time simulators allow real-time studies to be carried out taking into account a range of extreme situations and conditions, something that could be costly and cumbersome from the point-of-view of tests in the real system, and time-consuming if done by using offline simulators. Moreover, a functional application of real-time simulation is regarding educational purposes such as engineers, operator and technician training.
Before the digital simulators, TNAs (transient network analyzers) were used to EMTs simulation of power systems. These analog simulators were developed based on scaled-down physical components models of the power system, e.g., the transmission lines being represented by means a cascade analog pi sections. Some advantages of this approach are: the simulations are performed naturally in real-time; it allows the test of real pro-tection/control devices as well as the interface with digital simulators. However, due to their complexity, high cost, size limitations and, long setup and changeover times, as well as due to advances of computing, the TNAs have been replaced by the real-time digital simulators.
The real-time digital simulators of today are based on parallel processing, which can make use as hardware architecture either multi-core CPUs (central processing unit), general-purpose processors (GPPs), digital signal processors (DSPs) or computer clusters [Marti and Linares 1994, Pak et al. 2006, Hollman and Marti 2003], and more recently FPGAs.
CHAPTER 1. INTRODUCTION 5
Usually, CPU-based RTSs are better options for simulating large power systems using a reasonable time-step (e.g., in order of few microseconds). However, due to its sequential nature these simulators have limitations on the minimum integration time-step size, e.g., some architectures allow to use 50 µs (20 kHz) as the time-step to represent voltage/cur-rent high-frequency transients, thereby, the representation of frequency components up to 10 kHz (according to Nyquist criterium). This ends up being a drawback for simula-tions of higher-order terms, such as the ones contained in the EMTs of power converters or in traveling wave transients taking place in transmission lines. Regarding the protec-tion area, some property (e.g., the magnitude) of this frequency content can be used as a parameter for fault detection.
Addressing those technical limitations, efforts have been made in the development of FPGA-based real-time simulators as well as its integration with conventional RTSs. For instance, [Parma and Dinavahi 2007, Matar and Iravani 2011] present designs to perform real-time simulations of power electronic systems, electric machines and the associated control strategies, whereas [Chen and Dinavahi 2009, Matar and Iravani 2013, Chen and Dinavahi 2013, Razzaghi et al. 2016] describe designs to carry out real-time simulations of power systems. [Liu and Dinavahi 2018] presents the implementation of a power trans-former for electromagnetic transients studies.
1.3
Digital Real-Time Simulation: Challenges
In a simplistic way, RTSs can fit into one of these two categories: • Commercial RTSs.
• Laboratory-scaled RTSs.
Commercial RTSs of power systems are designed based on hardware architectures with high computing power. These simulators are commonly used to be applied to a wide range of applications using a defined time-step, probably chosen for the worst scenario and obeying the existing compromise between the size of the simulated system vs mini-mum time-step required. Those attributes make them, justifiably and, in a relative manner, expensive RTSs. Some available commercial RTSs are the RTDS (from RDTS gies Inc.), HYPERSIM (from Hydro-Quebec), eMEGAsim (from OPAL-RT Technolo-gies Inc.), NETOMAC (from SIEMENS AG) and, Typhoon HIL (Typhoon HIL Inc.).
Laboratory-scaled RTSs usually have a more limited computational power and, there-fore, are usually applied for more specific studies. Despite, according to the used hard-ware architecture, such simulators can be build to allow smaller integration time-steps than the commercial ones.
As highlighted earlier, in the context of power system simulation, there is a need of us-ing smaller simulation time-steps in order be able to compute accurately high-frequency transients of power systems in the sense of taking advantage of this information to perform studies and cover new applications, which potentially can be used to improve existing so-lutions. Taking this point of view, companies, as well as the scientific community, have been working towards efficient solutions in terms of processing speed. FPGA-based plat-forms are great to deal with this requirement. These devices have been included in com-mercial technologies to perform real-time simulation and tests using the HIL approach.
What makes FPGA suitable to be used as a computational core of real-time simulators is tied to its inherent features, such as reconfigurability and feasible parallel architecture, which make it an excellent solution for speeding up the calculations without compromis-ing accuracy. Other reasons are related to the increased resources (e.g., number of logic resources, RAM blocks, DSPs blocks) and computational power of the FPGAs by the years as well as its great performance, based on the efficient implementations, in terms of energy efficiency.
1.4
Motivation
The motivation of this work is supported on the importance to show the main steps to perform simulations in real-time using a customized-low-cost platform based on FPGA with a high-level and friendly programming language. Thus, verify a solution for the calculation of traveling waves taking place in transmission lines. In other words, the mo-tivation is based on the possibility of providing theoretical and practical information for the development of a real-time simulator, customized, low-cost, and suitable to perform studies of traveling waves taking place transmission systems. In addition, it is intended to verify a friendly programming environment as an alternative to implement component models of power systems and, thus, use strategies to perform real-time studies.
A second motivation attached to this work is based on the possibility to carry out stud-ies related to protection systems based on traveling waves using the HiL configuration. Therefore, it is intended to verify the possibility of implementing a traveling-wave relay and place it in a closed-loop with a simulated system in real-time.
1.5
Objectives
The goal of this work is to develop a simulation platform suitable to perform real-time simulations of power systems with hardware-in-the-loop to support the development and assessment of traveling wave-based relays using a low-cost hardware architecture based on FPGA.
To achieve the expected results, the following specific objectives have been defined: • Implementation, in the FPGA, of power system models, such as transmission line,
lumped elements, switches, sources, and fault circuit following concepts of EMTP programs.
CHAPTER 1. INTRODUCTION 7
• The integration of an actual signal generator to the simulation, which is important to highlight the possibility to integrate actual power system components in real-time simulations.
• Implementation of a relay prototype in a DSP (Digital signal processor), first run-ning a conventional protection function and, later, executing a protection scheme of traveling waves.
• Provide the integration link between the relay and power system simulated in real-time in a hardware-in-the-loop. The prototype performance is evaluated for the case of faults applied to transmission lines.
• The implementation of a graphical user interface (GUI) for setting the simulation parameters and also monitor, in real-time, the dynamic of the simulated power sys-tem.
• To evaluate and validate the results in real-time by means of the comparison with those obtained from offline simulators.
1.6
Contributions
The contributions of this work are as follows:
• A methodology to perform real-time simulations of power systems using an low-cost FPGA-based platform to support the development and assessment of traveling wave-based protective relays in a hardware-in-the-loop connection.
• To provide details regarding the implementation and development of a platform suitable to perform a hardware-in-the-loop real-time simulation by using a high-level and friendly programming language.
1.7
Methodology
The methodology presented in this research goes from the delimitation of the problem to the validation of the final results in order to achieve the established goals.
Firstly, technical arguments are searched in the literature to put in evidence the impor-tance of real-time simulation tools for carrying out EMT studies of the electrical power system. The understanding of the constraints present in existing real-time simulation plat-forms which end up limiting its use for some specific studies is vital since the motivation of this research is also intended to address those limitations. A theoretical investigation of researches, proposing hardware platforms designed to overcome constraints in existing RTSs, is done.
Thus, a literature review on the RTS applied to EMT studies is made. Then, this work presents a step-by-step description of the implementation of a real-time simulator using a low-cost FPGA-based platform, taking into account theoretical and practical aspects, as well as its integration with an implemented relay prototype. The real-time results are presented and validated by comparing them with those obtained using Matlab/Simulink.
1.8
Work Outline
This proposal is organized in six chapters:
• Chapter 1 presented an introduction about the real-time simulation technologies for EMT studies of electric power systems and its application.
• Chapter 2 illustrates the state-of-the-art regarding digital real-time simulators. • Chapter 3 describes the computational models of power systems components used
in EMTP-based programs. Moreover, it provides simulations results concerning the implementation of a power system using the theory presented in such chapter. • Chapter 4 introduces the main building blocks of digital relays. Furthermore, it
provides an introduction regarding a traveling-wave-based transmission-line method. Moreover, it present simulation results concerning the power system presented in Chapter 3 for such a relay providing the transmission line protection.
• Chapter 5 present the hardware architectures employed to build the simulator, the FPGA-based simulator design focusing on the power system implementation used as a case study, and the implementation of a traveling-wave-based transmission-line relay in DSP.
• Chapter 6 presents the real-time results and, also, its comparison with the ones obtained from offline simulators.
• Chapter 7 presents the conclusions obtained in the development of this work, as well as proposal topics for future researches.
Chapter 2
State-of-The-Art
This chapter provides a review regarding the development of real-time digital simula-tors of power systems. At first, it highlights the works concerning the primary DSP-based architectures. Then, it is underlined proposals regarding the PC-clusters based simula-tors. The propositions related to the development of FPGAs-based simulation platforms are, then, presented. These last ones appeared from the needs to carry out real-time simu-lations of power systems using small time-steps (e.g., from hundreds of ns to decades of µs). Moreover, it is introduced, generically, the architectures of two commercial PC-based simulators, the RTDS (from RDTS Technologies Inc.) and eMEGAsim (from OPAL-RT Technologies Inc.).
2.1
DSP-Based Real-Time Simulators
Mathur and Wang (1989) presented the first real-time simulator applied to the analysis of electromagnetic transients in transmission lines. A simple three-phase system (com-posite by source, impedance, and open-ended line) was implemented, using a single DSP chip of the EVAL KIT NEC77230 development kit, and simulated in real-time. For such, a time-step of up to 85 µs could be used to achieve real-time simulation. Today’s time step required for EMT simulation of power systems is at least 50 µs.
Wang and Mathur (1989) is an extension of the previous work with the innovation of taking into account the frequency-dependent transmission line model. For the same hardware architecture, a time-step of up to 85 µs could be used to achieve real-time simu-lation. This minimum value limits the simulator resolution for the representation of EMTs of transmission lines.
Kezunovic et al. (1994) proposed a real-time digital simulator of power systems with applications related to relay testing. The hardware architecture used combines DSPs and a commercial-off-the-shelf (COTS) computer. The firsts devices are used to handle the calculations regarding the instrument transformers (CTs and CCVT) and to provide inter-facing with external devices, whereas the COTS are used to compute the remaining power system components. A Western Area Power Administration 345 kV network was imple-mented and simulated using a 50 µs integration step considering three test cases (varying the network complexity). The simulator spends 81 µs and 119 µs to update the output variables of a network with 30 and 42 buses, respectively. The results presented are not
in real-time since the integration time-step was smaller than the simulator computation time. However, real-time simulation is justified by replacing the COST for a more robust computer. This paper also covers a HIL test.
Dufour et al. (1996) proposed to perform real-time simulation of transmission lines with frequency-dependent parameters using a dual-DSP card. An efficient method for fitting both surge impedance and the propagation function of the transmission line is pre-sented. The minimum time-step allowed for transmission system (source, line, and load) simulation used as the case study is 145 µs. This value limits the representation of EMTs in transmission lines due to electric fault events (required at least 50 µs). The author justifies the use of smaller time-steps using other DSPs chips.
2.2
Supercomputer-Based Real-time Simulators
Marti and Linares (1994) proposed a solution in software for efficient implementation of the EMTP algorithm in order to perform real-time EMTs simulations of power systems using superscalar computer architectures. The RISC System/6000 model 560 station was used to perform the calculations of two power systems chosen as a case study. The mini-mum time-step allowed for simulation of the 30-node system was 107 µs, while the 38 µs was the minimum step-size admitted to performing real-time simulation of the 18-node system. Although this last case being suitable for EMTs representation of power systems, less than the maximum limit of 50 µs, in this work a metric was not established relating the required hardware device, the minimum time-step, and the simulated power system size.
2.3
CPU-Based Real-Time Simulators
Dinavahi et al. (2001) proposed an approach for the real-time simulation of power electronic controllers in power systems. The algorithm makes use of a numerical inter-polation and a variable time-step when the firing time of control signal is identified, thus reducing errors in the response of a simulated system. The 250 MHz MIPS R10000 pro-cessor was used as a hardware device to compute a voltage source converter (VSC) based reactive power compensator system (STATCOM) and its digital controller. The results using a time-step of 50 µs and the proposed method were similar to those obtained using a fixed time-step of 5 µs. With the proposed approach a single iteration took approxi-mately 54 µs to execute. The results of the presented method are not strictly in real-time. However, this work justifies the possibility of implementing the algorithm in DSPs.
Hollman and Marti (2003) presented a real-time simulator of power systems. The pro-posed hardware architecture is based on PC-clusters linked by an efficient communication interface. The idea is to symmetrically distribute the simulated system into computers and use a fast communication link among them in order to guarantee minimal simulation time-step. A 78-node system was simulated using 3 PCs and a 234-node system was run using 5 PCs, both at time-step of 50 µs. This article portrays the simulator hardware architecture and scalability requirements. This last feature might ends up to limit its use in real-time applications that require time-steps smaller than 50 µs.
CHAPTER 2. STATE-OF-THE-ART 11
Pak et al. (2006) described a PC-cluster-based RTS. Firstly, the simulator is presented by means of a description of the hardware setup, software, synchronization methods, and operation. Simulator architecture is formed using PC-clusters named target clus-ters, which act as the main computational engine of the simulator, and host clusters used for model development, compilation and loading the compiled programs into the clus-ter nodes. This architecture uses the MATLAB/SIMULINK environment as developing software. A three-level 12-pulse vector-controlled variable speed AC drive was used as a case study for evaluation of the real-time simulator performance. As a result, the whole evaluation system, formed by an AC supply, a serie filter, 3-phase 3-winding transformer, 3-phase dual rectifier bridge, DC filter, and the subsystem under study which corresponds the squirrel cage induction machine, the drive, and the digital controller, was simulated with a time-step of 10 µs for a maximum computation time of 5.35 µs. It provides no cov-ered information regarding how portions of the power system are distributed and handled by PCs-cluster.
Mao et al. (2018) presented a hybrid simulator of power systems. The hybrid term is referred to simulator architecture, which is composed of a physical analog subsystem (PAS), a digital simulation subsystem (DSS) and an interfacing system, thus existing in-teraction between these two subsystems. The power system is modeled in the RTDS, while the PAS is composed of physical scale-down models (e.g., generator, transformer, load, etc.). The interfacing system, based on multiple back-to-back converters in parallel with 20 kHz (IGBT-based) switching frequency, is formed by a digital side interface, a physical side interface, and a signal iteration system. The digital interface is modeled using the RTDS in which a controlled current source is adjusted based on PAS measure-ments. At the physical interface, a VSC with a four-quadrant operation tracks the DSS terminal voltage. Real-time results obtained using the RTDS were used to validate the ones acquired using the proposed simulator. These results demonstrated the excellent dy-namic performance of the hybrid simulator. Numerical comparisons could improve the accuracy measurement of the simulations.
2.4
FPGA-based Real-Time Simulators
Chen and Dinavahi (2009) presented the development of an RTS based on FPGA for simulation of electromagnetic transients in power systems. The main steps related to the development of the simulator, from the hardware device description, modeling (e.g., frequency-dependent transmission line model), implementation, the operation of the simulator to results, are presented didactically. The EMTP program was implemented in the FPGA, exploiting, when possible, several levels of parallelism. For validation purposes, a power system was implemented and simulated using a time-step of 12 µs, which is a suitable value for EMT simulation of power systems. A HIL test could be performed to evaluate the simulator performance when connected to an external device.
Matar and Iravani (2010) illustrated a methodology for real-time simulation of elec-tromagnetic transients of power converters using an FPGA-based hardware device. The simulator was designed exploiting the FPGA custom and parallel architecture in order to allow simulations to be performed using time-steps of a few hundred nanoseconds. The converter is implemented based on the associated discrete circuit (ADC) model, wich the ON (OFF) state is represented by an inductance (capacitance), i.e., the switch is computa-tionally represented by means a Norton equivalent circuit. Consequently, the admittance matrix of the system remains constant. The solver was developed based on the EMTP theory, exploiting when possible the parallelism levels allowed by the algorithm. For validation purposes, two- and three-level VSCs were implemented and simulated. The Matlab/Simulink results were used as a benchmark to prove simulator performance. It was possible to use a simulation time-step of 60 ns and yet achieving real-time simula-tion. Even the RTS be developed to perform hardware-in-the-loop real-time simulations, tests using this setup were not performed.
Matar and Iravani (2011) proposed a methodology to perform EMTs simulation in real-time of AC machines using an FPGA-based simulator. The discrete form of the 0dq-based model was implemented taking advantages of possible degrees of parallelism. The first level is attainable from existing decoupling between the electrical and mechanical subsystems by introducing one time-step delay between the solutions of the two sets of equations. The second and third levels are achieved by means the parallel implementation of the matrix-vector multiplication and the primitive operations, respectively. Conse-quently, for the adopted FPGA environment, electrical machine simulations can be per-formed using a minimum time-step of 44 ns. The presented design can be used to sim-ulate field-controlled synchronous machines, permanent-magnet synchronous machines, squirrel-cage induction machine, and doubly-fed asynchronous machine. Despite, some implementation aspects could be highlighted, such as the FPGA resources allocated to compute the model and illustration of the power converter integration with the electric machine.
Chen and Dinavahi (2013) presented a multi FPGA-based RTS for electromagnetic transient simulation of large power systems. For evaluation purposes, two case studies were implemented and simulated in real-time. The first one is a 42-bus power system implemented using a 3-FPGA array and the other a 430-bus network simulated using a 10-FPGA array. It was proposed a strategy of decomposition of the power system into clusters, e.g., calculation units regarding the same element type (e.g., transmission line unit) are programmed in parallel using the same or in a set of FPGAs. Therefore, besides the parallelism exploited for different components models, a level of parallelism was achieved for elements of the same type. For such a simulator, the minimum time-steps allowed were 12 and 37 µs for the 42 and 430-bus systems simulation, respectively. FPGA-based architecture can be used to simulate large power systems. Moreover, it is possible to perform power system simulations at different rates, even though no simulation is carried out using this approach.
CHAPTER 2. STATE-OF-THE-ART 13
Matar and Iravani (2013) presented a reconfigurable FPGA-based RTS for EMTs stud-ies of power systems in real-time and faster than real-time. The simulator was developed to operate in real-time for performing closed-loop protection and control device tests with a power system being executed in real-time, while the faster than real-time operation is designed to carry out statistical studies quickly. The structure of the EMTP algorithm is analyzed and implemented in the FPGA taking advantage of all possibles parallelism levels such as the ones present in the subsystems/components model, equations, and prim-itive operations. A power system used as a case study was implemented and simulated for the real-time and faster than real-time modes using a time-step of 5 µs. This last mode is accomplished due the simulator be able to calculate the power system output variables every 24 ns, thus, setting the discrete models for a step of 5 µs, the simulation time-step is changed to 24 ns. The simulator is designed to operate in a hardware-in-the-loop mode. However, simulation using this setup was not established.
Taveiros et al. (2015) proposed an internal model state-feedback control strategy for the regulation of rotor direct and quadrature currents for wind-driven DFIG. A hardware-in-the-loop configuration was developed to validate the proposed control performance considering a real-time scenario. A DFIG-based wind energy conversion system was implemented using an FPGA-based platform, whereas the proposed method is executed in a DSP-based platform running at 1kHz of sampling frequency. This article focused on the method performance, thereby, details regarding the hardware-in-the-loop implementation are not covered.
Razzaghi et al. (2016) presented the development of an automated RTS using a hard-ware device based on RIO technology which integrates into its architecture an FPGA and a real-time processor. The proposed solver integrates the Modified Augmented Nodal Analysis (MANA) method, the Fixed Admittance Matrix Nodal Method (FAMNM), the optimal selection of the switch model conductance parameter, and the implementation of an efficient matrix-vector multiplier. The solver was implemented by taking advantage of parallelism levels allowed by the element models and also the presented formulation. The proposed simulator uses the EMTP-RV environment both as a GUI and for generating the data output file of the power system structure for the solver implemented in the FPGA. As a result, real-time simulations of a power converter and a three-phase distribution sys-tem were performed using a time-steps of 150 ns and 6.4 µs, respectively. Measurements regarding the simulator scalability were not explored.
Ould-Bachir et al. (2017) presented a methodology to perform for real-time simulation of complex HVDC-MMC systems, with up to 501 levels, using a hardware architecture that combines CPU and FPGAs. The modular multilevel converter, which is implemented using FPGAs, is represented by a detailed equivalent model, which is obtained from the discrete representation of the submodules (discrete model of a half-bridge converter) and by the assembly of a Thevenin equivalent circuit for each converter arm. Meanwhile, the rest of the HVDC system is implemented using a CPU and interfaced with the converter using the SSN (state-space nodal) technique. The simulation technique was validated by means of the real-time simulation of an HVDC-MMC system, implemented for the cases of converters with 101 and 501 levels and, using a single (25 µs) and multi-rate sample rate (CPU: 25 µs, FPGA: 5 µs), respectively. Information regarding the parallelism levels
to be exploited using the proposed methodology are not presented.
Alvarez-Gonzalez et al. (2017) presented a high-fidelity RTS of a permanent-magnet synchronous motor drive under stator faults in an FPGA-based platform suitable for HIL tests. The machine nonlinearities, e.g., due to saturation and high-order harmonics, were accounted by means of data obtained from finite element solutions and stored in lookup tables (LUTs). Therefore, the PMSM model is represented by its discrete equations and by accessing data in the LUTs. The machine model is implemented in the FPGA, while six PWM gate drivers are implemented in a controller board. Furthermore, an experimental setup was designed to provide data to validate the real-time implementation. Several test cases were performed such as the fault transients analysis for a wide range of operating conditions. A good match between the results from the HIL and finite element analysis was obtained. Albeit the FPGA is clocked at 40 MHz and simulates the system with a time-step up to 1.25 µs, the digital to analog converter (DAC) limits the outputs to a 115 kS/s. Furthermore, additional practical information about exploiting the parallel architecture of the FPGAs are not detailed.
Yang et al. (2018) introduced a co-simulation platform formed by the RTDS and an FPGA-based board. The interface between these two platforms is achieved using the com-putational model of transmission lines. This connection is implemented, physically, using a bi-directional optical fiber. The proposed solver was programmed taking advantage of the parallelism levels of EMTP-type program. For validation purposes, a three-phase 11-bus system was split into two areas, implemented and simulated in the RTDS and FPGA. Then, a three-phase system of 141 buses was simulated using the previous concept, never-theless, with only 5 buses modeled in the RTDS. FPGA simulations were carried out with time-steps of 5.71 and 26.16 µs for the cases 1 and 2, while in the RTDS this step-size is fixed at 50 µs. The real-time results have shown FPGA-based real-time simulators can be combined with commercial simulators for simulation of larger and complex power sys-tems, eventually, running at different sample rates. No information about FPGA resource utilization is underlined in this work.
2.5
Commercial Real-Time Simulators
The Real-Time Digital Power System Simulator (RTDS) is a simulator from RTDS Technologies Inc. It was the pioneer project among the available commercial power system simulators, launched in 1991, suitable for protection relay tests. McLaren et al. (1992) presented the first RTDS version comprised by parallel processing architecture based on DSPs. Forsyth et al. (2004) introduces another version of the RTDS already composed of a hardware architecture based on clusters of PCS and suitable for closed-loop tests of protection and control systems. The RTDS simulator’s processing hardware comprised of rack-mounted processor cards connected to a backplane, communicating with the user’s workstation by means of a rack-mounted workstation interface card. In 2017 it was launched the latest version of the RTDS, the NovaCor, which is based on a powerful multicore processor. It is compatible with previous hardware. Each rack-mounted NovaCor chassis features IBM’s state of the art POWER8 processor, containing 10 powerful cores running at 3.5 GHz [RTDS Technologies Inc 2019]. This setup allows an entire power system simulation to be run on a single core. FPGA-based cards can be
CHAPTER 2. STATE-OF-THE-ART 15
used with RTDS in order to achieve very small time-steps.
The simulator eMEGAsim is a commercial real-time simulator from OPAL-RT Tech-nologies Inc. Bélanger et al. (2007) presented the eMegaSIM structure as well as its use for a range of applications, especially the ones requiring a hardware-in-the-loop config-uration for protection and control tests. Bélanger et al. (2009) presented eMegaSIM as a tool suitable to perform real-time simulations of large-scale power systems with power electronics equipment and integrated control systems. The simulator’s hardware architec-ture comprises a commercial-off-the-shelf (COTS) multi-core processor (Intel or AMD) module along with a fast on-chip inter-processor shared-memory communication. The simulated network is modeled using the Matlab/SIMULINK environment. The model is compiled code and then downloaded into target PCs for real-time simulation.
2.6
Summary
Table 2.1 summarizes the main publications related to real-time simulation of elec-tric power systems. The core computational engine of the real-time simulator, and the validation method, whether via simulations and/or experiments, are highlighted. Based on the reviewed literature, real-time digital simulators have recently used FPGAs in its hardware architectures with the motivation to make use of its features, such as reconfig-urability, high-speed clock, and inherent parallel design, to carry out real-time simula-tions of electric power systems addressing high-frequency phenomena such as electro-magnetic transients in power converters and travelling waves transients in transmission lines. The FPGA-based platforms have emerged as a trend for tests of control and protec-tion schemes using an HiL setup. Moreover, it can be noted a gap to be filled towards the hardware-in-loop tests aiming the development and evaluation of new control/protection systems, e.g., traveling wave-based transmission line protection systems.
Moreover, based on the presented works (Table 2.1), it can be noted a gap to be filled towards the hardware-in-loop tests aiming the development and evaluation of new con-trol/protection systems, e.g., traveling wave-based protection methods. In this work, it is detailed hardware-in-the-loop tests regarding a closed-loop established between a travel-ing wave-based transmission line relay prototype and a power system runntravel-ing in real-time in an FPGA-based platform.
Table 2.1: Summary of the literature review related to the real-time simulation of electric power systems.
Reference Main Computational Engine Protection HiL test Control HiL test
Mathur and Wang (1989) DSP − −
Wang and Mathur (1989) DSP − −
McLaren et al. (1992) DSP-cluster (RTDS) √ −
Kezunovic et al. (1994) DSP/PC − −
Marti and Linares (1994) Supercomputer − − Dufour et al. (1996) Dual-DSP card − −
Dinavahi et al. (2001) PC − −
Hollman and Marti (2003) PC-cluster − − Forsyth et al. (2004) PC-cluster (RTDS) − −
Pak et al. (2006) PC-cluster − −
Bélanger et al. (2007) multicore PCs (eMEGASIM) − − Bélanger et al. (2009) multicore PCs (eMEGASIM) − −
Chen and Dinavahi (2009) FPGA − −
Matar and Iravani (2010) FPGA − −
Matar and Iravani (2011) FPGA − −
Chen and Dinavahi (2013) FPGA-cluster − −
Matar and Iravani (2013) FPGA − −
Taveiros et al. (2015) FPGA − √
Razzaghi et al. (2016) FPGA − √
Ould-Bachir et al. (2017) PC/FPGA − −
Alvarez-Gonzalez et al. (2017) FPGA − √
Yang et al. (2018) RTDS/FPGA − −
Mao et al. (2018) RTDS/DSPs − −
In this review, two important advantages regarding FPGA-based real-time simulations can be highlight. The first is related to power system simulation using accurate models for the representation of traveling waves in transmission lines. Using small integration time-steps besides allowing a reliable representation of the transients also supports studies based on traveling waves, for example, the ones related to fault location in transmission lines. The second one concerns the development of simulation platforms suitable for performing relay tests and control devices in an HiL configuration.
Chapter 3
EMTP Models of Power Systems
This chapter introduces the general mathematical formulation regarding the power system element models addressed in this work, such as linear lumped elements, switches, transmission lines, voltage sources, etc. The EMTP algorithm is introduced either for underlying the simulation building process and verifying the possibilities of implementing sections of it in parallel processing architectures. For evaluation purposes, a case study is implemented in both Matlab, using the theory presented in this chapter, and Simulink. This offline evaluation constitutes an important step towards a posterior efficient real-time implementation.
3.1
Linear Lumped Elements Modeling
This section describes the computational models of linear lumped elements such as re-sistance, inductance, capacitance, and its combination, determined from a chosen numer-ical method. The methodology used in the description of mathematnumer-ical equations follows the same basis presented in [Dommel 1969, Dommel 1996, Bayoumi 2009, Chen 2012].
3.1.1
Generic Formulation
Computational equations of linear lumped elements can be obtained applying a nu-meric integration rule to its respective differential equations, for instance, the backward Euler and trapezoidal rule. As a result, linear lumped elements models such as R (resis-tance), L (induc(resis-tance), C (capaci(resis-tance), and its combinations (RL, RC, LC, and RLC) can be represented by a Norton (or Thevenin) equivalent branch.
For illustration purpose, consider the first-order differential equation u(t) = Kdy(t)
dt , (3.1)
where K is a constant, y(t) and u(t) are two variables related by (3.1). For instance, suppose y(t) and u(t) are respectively current and voltage of some linear lumped element. (3.1) can be written in the form of
y(t) = y(t − ∆t) + 1 K
Z t
where ∆t is a discrete time-step.
A numerical integration rule can then be used to solve (3.2) for each discrete time interval of ∆t. This operation results in
y(t) = Gu(t) + h(t − ∆t), (3.3)
being,
h(t − ∆t) = K1u(t − ∆t) + K2y(t − ∆t), (3.4)
where G, k1, and k2are constant values, and h(t − ∆t) is a historical term calculated from
the previous values of y and u, respectively. Therefore, (3.3) can be represented graph-ically as the same form depicted in Figure 3.1, which is the generic Norton equivalent form of linear lumped elements. Req is theq numeric value representing the equivalent resistance (Req = 1/G). Hence, all linear lumped branches can be represented in a digital computer as current sources and resistances.
1 2 h(t- t)Δ y(t) u(t) Req +
Figure 3.1: Norton equivalent circuit for linear lumped elements.
3.1.2
Numerical Integration Methods
The backward Euler and trapezoidal methods are the two integration rules usually used in EMTP programs. These methods are the ones exploited in this work and, are briefly described based on Figure 3.2. Suppose u is a continuous function with the time, for instance, a terminal voltage of some linear lumped element. u(t) is the value assumed by u at time t, whereas u(t − ∆t) is its previous value.
CHAPTER 3. EMTP MODELS OF POWER SYSTEMS 19
Consider that the following equation is the one to be solved in the interval delimited by t − ∆t and t, i.e., it is required to solve the integral of u as follows
U(t) =
Z t
t−∆tu(t)dt, (3.5)
where U (t) labels the integral calculation. Backward Euler Method
Using the backward Euler integration method, then (3.5) is solved as follows
U(t) = u(t)∆t, (3.6)
which can be represented graphically as the rectangle area defined by the boundaries CEBDC in Figure 3.2. Thus, using Backward Euler rule, (3.2) can be written as
y(t) = y(t − ∆t) + 1
Ku(t)∆t, (3.7)
and, can assume the form of
y(t) = Gu(t) + h(t − ∆t), (3.8)
which is the same format of (3.3) and, is in the form depicted in Figure 3.1. Trapezoidal integration method
Using the trapezoidal integration rule, then (3.5) is solved as follows U(t) = [u(t) + u(t − ∆t)]∆t
2 , (3.9)
which can be represented graphically as the trapezoidal area defined by the boundaries CABDC in Figure 3.2. Thus, using the trapezoidal rule, (3.2) ca be written as
y(t) = y(t − ∆t) + 1 K
[u(t) + u(t − ∆t)]∆t
2 , (3.10)
and, can assume the form of
y(t) = Gu(t) + h(t − ∆t), (3.11)
which is also the same format of ( 3.3) and, is in the form depicted in Figure 3.1.
3.1.3
Choosing The Numerical Integration Method
The numerical integration rule used to obtain the algebraic equations of the linear lumped elements must be chosen based on the following requirements:
• computational efficiency, and • accuracy.
In terms of computational efficiency, the trapezoidal and the backward Euler methods require values known at the previous time-step. However, the numerical solution found using the backward Euler method requires fewer operations to the one obtained from the trapezoidal rule. In terms of stability, in Bayoumi (2009) is illustrated, according to the location of poles and zeros in Z plane (Z transform domain), that both methods satisfy the stability condition,
|Z| ≤ 1, (3.12)
i.e, the poles and zeros are not outside the unit circle defined in plane Z.
In terms of accuracy, and for a fixed time-step, the trapezoidal rule is more accurate than the backward Euler. However, the simulation results can exhibit numerical oscilla-tion when discontinuities occur, e.g., due to switching events. Therefore, it is required an additional method for damping those oscillations [Marti and Lin 1989]. On the other hand, the backward Euler method, inherently, provides the damping of numerical os-cillation. Furthermore, selecting smaller time-steps, backward Euler rule can provide the acceptable accuracy when the results are compared with the ones obtained using the trapezoidal rule and a larger integration time-step, e.g., for a ratio 1:2. Therefore, the linear lumped element models used in this work are based on the Backward Euler rule of integration.
3.1.4
Resistance (R) Element
Figure 3.3 depicts the lumped resistance element. The variables i12(t) and v12(t) are
current flowing from node 1 to 2, and the voltage between the nodes 1 and 2, respectively, in the specific element, which is a resistor with resistance R in this case.
1 2
i (t)12 R
+ v (t)12
-Figure 3.3: The resistance R element and its discrete-time model.
The discrete-time model of this element is equal to the continuous case. However, the computational model is solved at a fixed time-step ∆t. The equation relating current and voltage is give by
