• Nenhum resultado encontrado

Design and Analysis of a Proposed Timer Controller with Constant Switching Frequency Boost PFC Converter

N/A
N/A
Protected

Academic year: 2016

Share "Design and Analysis of a Proposed Timer Controller with Constant Switching Frequency Boost PFC Converter"

Copied!
13
0
0

Texto

(1)

Design and Analysis of a Proposed Timer

Controller with Constant Switching

Frequency Boost PFC Converter

Mr. D. Lenine*1

*Assistant Professor, Department of Electrical and Electronics Engg. RGMCET, Nandyal, India-518 501.

Dr.Ch. Sai Babu**

**

Professor, Department of Electrical and Electronics Engg. JNT University, Kakinada, India.  

Abstract: - The Proposal of this paper is to introduce a new control technique for power factor correction in ac-dc converters. The increasing of non linear loads such as thyristor rectifiers, switching-mode power supplies and adjustable speed drives, generate harmonic currents causing various problems to the other equipment connected to the point of common coupling. There is a disadvantage in the existing PFC control implementation based on conventional hysteresis current control is variable switching frequency. The proposed control technique, it combines the advantages of conventional hysteresis control strategy and the prominent characteristics of constant switching frequency. The fundamental idea consists in determining the ideal time period that exists between the moment when the input current crosses with the reference current and the converter commutation. Thus the input current can oscillate around the reference current with constant frequency of operation. The principal of operation, theoretical analysis, simulation results on a single phase boost converter are presented.

Key words: - AC-DC Converter, Timer control technique, Design and analysis of PFC, and Simulation results.

1. INTRODUCTION

Single-phase switch mode ac-dc converters are being used as frontend rectifiers for a variety of applications due to the advantages of high efficiency and power density. These classical converters, however, draw-non-sinusoidal input ac currents leading to low input power factors and injection of harmonics into the utility lines. Research in improved power quality utility interface has gained importance due to stringent power quality regulation and strict limits on Total Harmonic Distortion (THD) of input current placed by standards such as IEC 61000-3-2 and IEEE 519-1992. This has led to consistent research in the various techniques for power quality improvement. Research into switch mode power factor corrected ac-dc converters has been in two directions namely buck and boost type topologies. On the other hand the boost type converter generates DC voltage, which is higher than the input ac voltage. However, the input current in these converters flows through the inductor and therefore can easily be actively wave-shaped with appropriate current mode control. Moreover, boost converters provide regulated dc output voltage at unity input power factor and reduced THD of input ac current.

These converters have found widespread use in various applications due to the advantages of high efficiency, high power density and inherent power quality improvement at ac input and dc output. The preferred power circuit configuration of single-phase boost converter is the most popular and economical PFC converter consisting of diode bridge rectifier with step-up chopper. The hysteresis control introduces a minor error in the average input current and provides better dynamic response than the PWM control [7], but an inherent drawback is the variable switching frequency therefore, the control of circuit has to be designed for a large band, otherwise it will cause low frequency harmonics. The proposed control technique, it combines the advantages of

       1 

This work was supported in part by the research work by the JNT University, Kakinada, Dept of Electrical and Electronics Engg.

*D.Lenine, Asst.Prof/EEE is with the RGM College of Engineering and Technology, Nandyal. (Corresponding author to

provide e-mail:lenine_2004@yahoo.com).

(2)

conventional hysteresis control strategy and the prominent characteristics of constant switching frequency [3], [1].The model of the system is derived and simulated through by MATLAB/Simulink.

2. SYSTEM CONFIGURATION

Figure 2. Shown the schematic diagram of the timer control circuit. As seen, the control method has two loops, the current control loop and the voltage control loop.

A. Voltage Control Loop

The error is estimated from the DC output voltage measurement. The DC output voltage control loop maintains the capacitor voltage at a set reference value using feedback action. The error at the DC output is regulated by a PI controller (voltage compensator or Integrator) and the PI controller output is added to the current control loop to vary the duty ration to maintain the DC output voltage [2].

B. Current Control loop

The error is estimated from the source current measurement. When a harmonic load side is introduced, harmonic current introduces discontinuous as an error in the source current. The control circuit finds the switching instants so that duty ratio required compensating the error is achieved .Thus it does make faster compensation since the duty required for instantaneous current requirement is implemented with in the sample period [2].

C. System Description

The topology of Boost converter is shown in Figure 1.

(a) Boost converter operates at continuous conduction mode.

(b) The switching frequency is much higher than the line frequency.

 

Figure 1. Basic Boost Converter with uncontrolled bridge rectifier

        

a). Switch is closed b). Switch is open.

When ‘S’ Closed: In this mode of operation the switch is in on state. In this mode in Figure. 1a, the current flows through switch and inductor, so the energy is stored to the inductor. At the same time, the capacitor discharges and supplies current to the load [4].

(3)

3. PROPOSED POWER FACTOR CORRECTION CIRCUIT AND ANALYSIS A. Constant switching frequency technique

The fundamental idea consists in determining the ideal time period that exists between the moment when the input current crosses with the reference current and the converter commutation. Thus the input current can oscillate around the reference current with constant frequency of operation [3]. Figure 4. shows the behavior of the input current along an incremental time interval, where the reference current is practically constant.

Figure. 2. Timer control for single-phase boost PFC converter.

If the switching frequency is considered much greater than the line frequency, the behavior of the inductor current can be described according to Figure 2, which corresponds to an ideal situation i.e. triangles ABC and CDE have the same area. To obtain this, it is necessary to determine time intervals Δt1 and Δt3 which correspond to the exact moments which correspond to the exact moments when the switch is commutated. Intervals Δt1 and Δt3 are determined as function of the circuit parameters, in order to maintain constant switching frequency.

(4)

Advantages:

1. The switching frequency is constant. 2. Does operate over a large input range. 3. No need of compensation ramp.

4. Converting a voltage source into a fast-acting current source. 5. The inductor is easy to design.

6. Low distorted input current waveforms with fixed load.

Disadvantages:

1. The circuit likes fixed load that do not vary. 2. Operate low switching frequency.

3. The frequency goes very high for light load high line. 4. Filter is larger than standard SMPS filter.

5. Current peaks are higher than continuous duty mode.

4. MATHEMATICAL DESIGN AND ANALYSIS

A. Design of Duty Cycle and Transistor turn-On

In order to analyze the proposed control strategy, the circuit shown in Figure 4. must tie considered, where it can be seen that the generic converter operation can be defined in two distinct stages [3] [5].

Figure 4.Current shape along switching period

Expressions (1) and (2) represent the increasing and decreasing rates of the input current, respectively.

L

dt

V

V

I

L

Z

d

)

(

2

(1)

L

dt

V

V

I

L

Z

d

)

(

1

(2)

Within these aspects, the output voltage is constant and the reference current variation is considered linear. In addition to this, the increasing and decreasing rates of the inductor current can be considered constant. Therefore triangles ABC and CDE have the same area and the following expressions are valid:

3

2

t

t

(3)

4

1

t

t

(4)

∆t1- time period in which the current derivative is positive, from the crossing point with the reference current to

the instant of commutation;

∆t2- time period in which the current derivative is negative the instant of commutation to the crossing point with

(5)

∆t3- time period in which the current derivative is negative from the crossing point with the reference current to

the instant of commutation;

∆t4-time period in which the current derivative is positive the instant of commutation to the crossing point with

the reference current.

Time interval ∆t1 can be calculated from (5)and (6)

2

2 1 s

T

t

t

(5)

2 )

( )

( 2 2 1

1 1 ref T t t t d Z t t t d Z I L dt V V L dt V V       

    

(6) dt dI T Irefref

(7)

Finally, from the previous expressions, interval ∆t1 is given as (8):

        dt dI L V V V T

t o d

o

4

1

(8)

Similarly, ∆t3can be obtained from (9).

        dt dI L V V V T

t o d

o

4

3

(9)

B. Inductor Design

The selection of inductor and the capacitor in the Boost topology plays a major role in the output response. The inductor (L) is given in eqn (10),

W V t

L on rms

     2 min 2  (10) 1 2 min    rms dcOutput V V

R

(11)

Where, ) 1 ( R f R t s

on

or min 2 2 rms on V W L t      

Where Vrmsminis the source voltage, ηis the efficiency of the system, W is output powerand ∆ton is rate of

change of on-time.

C. Capacitor Design

The capacitor (C) is given as eqn (12),

         o p o o V V V I C  

(6)

Where

ω

is the frequency, Vp is the Peak source voltage, Io is the output current and ∆Vo is the peak to peak

ripple output voltage.

D. Determination of the objective function

The significant subject of the Hysteretic control PFC method is how to determine the objective function. In this paper, Total Harmonic Distortion (THD) of the input current is chosen as the objective function [6]. The objective of the Hysteretic control PFC algorithm is to achieve a high power factor. The ideal situation is unity power factor. The power factor define as given in eqn (14).

( ) ( ) ( ) averagepower PF RMSvoltage RMScurrent

 (13)

Therefore,

cos

1 rms

I

I

r

PowerFacto

                    (14)

Where,      

 2 2

12 1 2 1 M rms I I

In the rectifier cascaded by a PFC circuit, the displacement factor is one. So if the distortion factor approaches one. Unity power factor is realized. The relation between THD and distortion factor is given in eqn (15) and (16).

Total harmonic distortion

1 1 100

(%)   2

d

k

THD (15)

Where, rms rms d I I

k 1

Therefore distortion Factor,

2 ) ( 1 1 ) ( THD DF Factor Distortion

 (16)

If the THD of line current is minimum, the distortion factor is maximum and the power factor become maximum too. Zero THD means unity power factor.

5. PROTOTYPE MODEL OF CONSTANT SWITCHING FREQUENCY CONTROL TECHIQUE

(7)

circuit and control circuit. The features of Opto-isolatorare very high speed (10 M. Bit/s), Superior CMR-10 kV/μs, double working voltage-480V,Fan-out of 8 over -40°C to +85°C,Logic gate output, Storable output.

Figure.5 Experimental Blok Diagram of AC-DC Converter

Figure.6 Experimental Set-up of Constant switching frequency control technique

The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Figure.6. a MOSFET driver circuit is designed to connect the gate directly to a voltage bus with no intervening resistance other than the impedance of the drive circuit switch. Gate drive act as a high-power buffer stage between the PWM out put of the control device and gates of the primary power switch MOSFET. This 30A, 200V, 0.085 Ohm, n-Channel enhancement mode silicon gate power field effect transistor is designed, tested and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits this switched voltage signal undergoes rectification in the filter circuit. Finally rectified pure DC signal is seen at the output terminal. The filter capacitor eliminates the unwanted ripple in the DC output.  

6. SIMULATION RESULTS

(8)

Figure.7. Constant gate pulses

Figure.8. Inductor current waveforms

(9)

Figure. 9. Output voltage waveform.

Figure. 10. Output Current waveform.

The switching frequency of 20 kHz. This gives the constant gate pulse waveforms as shown in figure.7. This controls the boost converter circuit. The supply current and voltage waveforms of a single phase circuit are shown in figure.9. It shows that the supply voltage and current are in phase with each other and has a power factor closer to unity. Figure.14. shows the line current virus distortion factor it is always closer to unity. Output voltage of boost converter across resistor of 53 ohms having the voltage of 395V and is operating at an almost constant DC voltage.

(10)

Figure.12. Line current virus Total harmonic distortion (THD %)

Figure.13. Line current virus Distortion factor (DF)

(11)

7. EXPERIMENTAL RESULTS

Figure.15 Gate Pulse

Figure.16. Gate Pulse with Control Technique

TABLE.I.

SUMMERY OF PERFORMANCE EVALUATION.

8. CONCLUSION

(12)

implementation based on conventional hysteresis control strategy is variable switching frequency. This system considered uses a unified overcomes such a drawback by constant switching frequency using this proposed control technique, all the duty cycles required to achieve closer to unity power factor with the switching frequency of 20 kHz. The design equations for selecting output capacitance and power factor have been presented. Simulation results shows that the proposal strategy works well and near unity power factor can be achieved over wide input voltage and load current variation range.

9. APPENDIXES

TABLE. II.

PARAMETERS USED IN THE TESTS.

10. ACKNOWLEDGEMENT

We express our sincere thanks to RGMCET for providing us good lab facilities. A heart full and sincere gratitude to my beloved supervisor professor Ch. Sai Babu Garu for their tremendous motivation and moral support.

 

11. REFERENCES

[1] Lenine D, Ch. Sai Babu and K.S.S.Prasad, “Improvement of Dynamic Response for Buck Converter Using Sliding Mode Like Control Technique”, IEEE TENCON’ 2008 conference proceeding, 2008.

[2] G.Ramtharan, S.G. Abeyaratne, “ Constant Frequency Control of an Active Power Filter”, Journal of the national science foundation, Sri Lanka, 2006 34(1), pp.21-28.

[3] Marcos T. Galelli, Mdrcio S.Vilela, “Proposal of aTimer Controller with Constant Switching Frequency and Power Factor Correction”, pp. 1737-1741, IEEE conference proceeding, 2005.

[4] A.Pandey, Prof B.Singh, “Comparative evaluation of single-phase unity power factor ac-dc boost converter Topologies”, IEEE conference proceeding .November 30, 2004.pp,102-109.

[5] Kenichi Iimori, Katsuji Shinolhm, Osamu Tammi, “New Current- Controlled PWM Rectifier- Voltage Source Inverter without DC Link Components”, PCC-Nagaoka ' 97, pp.783-786, IEEE conference proceeding, 1997.

[6] Prasad N. Enjeti and Roberto Martinez, “A High Performance Single Phase ac to dc Rectifier with Input Power Factor Correction”, pp.190-196, IEEE conference proceeding, 1993.

[7] Omar Stihi and Boon-Teck Ooi, “A Single-Phase Controlled-Current PWM Rectifier”, IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL 3, NO 4, pp. 453-459, OCTOBER 1988.

[8] Juan W. Dixon, Ashok B. Kulkarni, Masahiro Nishimoto, and Boon-Teck Ooi, “Characteristics of a Controlled-Current PWM Rectifier-Inverter Link”, IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS. VOL. IA-23, NO. 6. PP. 1022-1027, NOVEMBER/DECEMBER 1987.

[9] Mohan, Under land, Robbins, “POWER ELECTRONICS” - Converters, Applications and Design’, John Wiley & Sons.

[10] Muhammad H. Rashid, “POWER ELECTRONICS” – Circuits, Devices and Applications’, Prentice Hall of India Private Limited.

[11] M D Singh, K B Khanchandani, “POWER ELECTRONICS” - Tata McGraw – Hill Publishing Company Limited.

(13)

D.Lenine was born in Pondicherry, India in 1978. He received the B.Tech (Electrical and Electronics Engineering) degree from Pondicherry University, India in 2004 and the M.Tech (Electrical Drives and Control) from same University in 2006. In 2006 (October) he joined the Dept. Electrical and Electronics Engineering , R.G.M. College of Engineering and Technology, Nandyal, as a Assistant Professor. He has published/presented several technical research papers in national and international Journals/conferences. His field of interest includes AC-DC Converter, Power factor correction Electrical Drives, Digital control Techniques, Digital control of electrical machines and Estimation of machines parameters. E-mail:lenine_2004@yahoo.com.

Ch. Sai Babu received the B.E from Andhra University (Electrical & Electronics Engineering), M.Tech in Electrical Machines and Industrial Drives from REC, Warangal and Ph.D in Reliability Studies of HVDC Converters from JNTU, Hyderabad. Currently he is working as a Professor in Dept. of EEE in JNTUCE, Kakinada. He has published several National and International Journals and Conferences. His area of interest is Power Electronics and Drives, Power System Reliability, HVDC Converter Reliability, Optimization of Electrical Systems and Real Time Energy Management.

Referências

Documentos relacionados

these LF components in idcin spectrum are responsible for fm interharmonics in iacin spectrum. It is rather well known from power electronics that for the analysis of SPC in

Simulation circuit of WECS with PMSG using Fuzzy Logic controller is shown in the Figure 12 .The output voltage for Buck Boost Converter and SPWM based inverter is

“Analysis of a Zero Voltage Transition Boost Converter using a Soft Switching Auxiliary Circuit with Reduced Conduction Losses”, in IEEE Power Electronics Specialists Conference

Figure 26: Input voltage ( v ref = 30 V ) of the buck converter with the control system designed in Section 3.3 (voltage loop with inner peak current

A single phase buck half bridge ac-dc converter topology with the output push-pull rectifier has two set of capacitor (C1 and C2) provides another ac terminal for this

With an appropriately designed control scheme with PI and ANN with Hysteresis controller then incorporated, the nine-switch converter is shown to favorably raise the

The high frequency operation results in increased power loss in hard switching converters because switching losses are major contribution in the total converter

µ-based UPFC controller synthesis: The main goals of the UPFC controller design are: Power system oscillation damping, DC-voltage regulator and power flow