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[PDF] Top 20 Design and Performance Analysis of Hybrid Adders for High Speed Arithmetic Circuit

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Design and Performance Analysis of Hybrid Adders for High Speed Arithmetic Circuit

Design and Performance Analysis of Hybrid Adders for High Speed Arithmetic Circuit

... integrated circuit performances are restricted by how best the arithmetic operators are implemented in the cell library provided to the designer for the ...complexity of arithmetic circuits ... See full document

12

Study and Performance Analysis of High Frequency and High Speed Operational Amplifier

Study and Performance Analysis of High Frequency and High Speed Operational Amplifier

... segment of total worldwide sales is dominated by the MOS ...primarily of memory, micro and logic sales, the total combined MOS revenue contributed approx 75% of total worldwide sales, ... See full document

5

Performance Comparison of Hybrid Signed Digit Arithmetic in Efficient Computing

Performance Comparison of Hybrid Signed Digit Arithmetic in Efficient Computing

... considerable speed improvement compared with operators designed using conventional number ...execution speed of an arithmetic operation is directly related to chosen architecture and ... See full document

10

Analysis and performance of high efficiency synchronous reluctance machines

Analysis and performance of high efficiency synchronous reluctance machines

... poor performance, they were ignored during the earlier part of the 20 th century except for special ...sixties and seventies, synchronous reluctance motors were extensively investigated as line-start ... See full document

8

Performance Analysis of Reversible Fast Decimal Adders

Performance Analysis of Reversible Fast Decimal Adders

... decimal arithmetic is gaining popularity in the computing community due to the growing importance of commercial, financial, and internet-based applications, which normally process decimal ...with ... See full document

6

Design of High speed Low Power Reversible Vedic multiplier and  Reversible Divider

Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider

... vertical and crosswise, is designed using reversible logic gates, which is the first of its ...division circuit. This circuit is designed using reversible components like reversible parallel ... See full document

5

Resolution of Arithmetic Problems, Processing Speed and Working Memory in Children

Resolution of Arithmetic Problems, Processing Speed and Working Memory in Children

... standing of addition and subtraction when en- tering elementary school predicts later math- ematical performance (Geary, 2011; Groen & Resnick, 1977) and that the effi ciency of the ... See full document

18

J. Microw. Optoelectron. Electromagn. Appl.  vol.10 número2

J. Microw. Optoelectron. Electromagn. Appl. vol.10 número2

... magnitude and phase of the communication ...increase of data rate, it was found that relevant values of signal delay or group delay seem also necessary for example, to insure the signal ... See full document

12

Analytical Modeling of SON MOSFET and Realization Inverter Circuit for High Speed and Ultra Dense Low Power Circuits

Analytical Modeling of SON MOSFET and Realization Inverter Circuit for High Speed and Ultra Dense Low Power Circuits

... SON is found to be more resistive against different short channel effects, more specially Drain Induced Barrier Lowering (DIBL) and two dimensional charge sharing eff[r] ... See full document

5

Rev. bras. geriatr. gerontol.  vol.19 número1

Rev. bras. geriatr. gerontol. vol.19 número1

... risks of falls, especially during the performance of simultaneous tasks during ...effects of dual tasks (DT) on spatiotemporal gait parameters and to identify the tools and tasks ... See full document

18

Optimization Techniques for Source Follower Based Track-and-Hold Circuit for High Speed Wireless Communication

Optimization Techniques for Source Follower Based Track-and-Hold Circuit for High Speed Wireless Communication

... On-resistance of Transmission-gate shows the linear characteristics hence linearity in output waveform is expected this is confirmed by the HSPICE simulation ...cost of area ... See full document

15

PERFORMANCE OF SPRAY NOZZLES IN LAND APPLICATIONS WITH HIGH SPEED

PERFORMANCE OF SPRAY NOZZLES IN LAND APPLICATIONS WITH HIGH SPEED

... aim of this study was to evaluate different spray nozzles for land applications in high speed on the coverage and deposit in soybean plants ...at speed of 4.17m.s -1 (control), ... See full document

7

Application of time-series analysis for prediction of molding sand properties in production cycle

Application of time-series analysis for prediction of molding sand properties in production cycle

... Time-series analysis is characterized, as a data mining tool which facilitates understanding nature of manufacturing processes and permits prediction of future values of the process ... See full document

5

A new circuit technique for reduced leakage current in Deep Submicron CMOS technologies

A new circuit technique for reduced leakage current in Deep Submicron CMOS technologies

... reduction of standby power can be obtained by avoiding some limiting physical effects on transistor ...CMOS design flows can be used as the basis for the suggested extensions of the proposed ... See full document

4

Study on New Smart Transformer Terminal Unit Based on ARM and GPRS Network

Study on New Smart Transformer Terminal Unit Based on ARM and GPRS Network

... composed of Transformer Terminal Unit (TTU), GPRS wireless communication network and master ...collection, analysis and record, pops up alarm information in time when the transformer has ... See full document

6

ARM Processor Based Embedded System for Remote Data Acquisition

ARM Processor Based Embedded System for Remote Data Acquisition

... provides high performance, low power consumption, small size, and high speed of ...Varieties of embedded systems used for remote data acquisition based on internet will be ... See full document

4

Design of a current Mode Sample and Hold Circuit at sampling  rate of 150 MS/s

Design of a current Mode Sample and Hold Circuit at sampling rate of 150 MS/s

... sample and hold circuit uses a two stage ...stage and a common source amplifier at the output stage the op-amp provides a total gain of ...accuracy of 13 bits and unity gain ... See full document

3

Performance Of Different Tillage Implements And Their Effects On Sorghum And Maize Grown In Gezira Vertisols Sudan

Performance Of Different Tillage Implements And Their Effects On Sorghum And Maize Grown In Gezira Vertisols Sudan

... one of the major problems that are facing agricultural production in the ...to high production costs, low prices and high taxes had all resulted in a general deterioration of the ... See full document

6

Magali Leonel1 ; Taila Santos de Freitas1 ; Martha Maria Mischan2

Magali Leonel1 ; Taila Santos de Freitas1 ; Martha Maria Mischan2

... briqueting, and in ob- taining water-base ...gelatinization of starch also significantly affects the characteristics and quality of food such as loaf volume and crumb bread, the ... See full document

8

Selection Of High Performing Geometry In Flexure Bearings For Linear Compressor Applications Using Fea.

Selection Of High Performing Geometry In Flexure Bearings For Linear Compressor Applications Using Fea.

... motion and reduces friction between moving parts to only the desired motion or it is a mechanical element which locates two machine parts relative to each other and permits a relative motion between ... See full document

4

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